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PCI-X
Training
Books
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Training


Let MindShare Bring PCI-X to Life for You

Peripheral Component Interconnect - eXtension (PCI-X) architecture is a second generation of high performance I/O buses that is an extension to the PCI bus architecture. The PCI-X architecture specification is defined by the Peripheral Component Interconnect Special Interest Group (PCISIG). The PCI-X bus is a parallel multi-drop I/O bus with a data bus width of either 32-bit or 64-bit and a data transfer frequency of 66 MHz and up to 533 MHz effective. The PCI-X bus peak bandwidth capability ranges from 266 MB/s to 4 GB/s (Mode 2). Any two devices can communicate with one another on the bus in a peer-to-peer manner. Devices can be embedded on the motherboard or may be connected to the bus via a peripheral card plugged into a connector.

MindShare Courses On PCI-X:

Course Name
Classroom

Virtual Classroom

eLearning
Comprehensive PCI-X     
2 days

3 days
 

All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.


Comprehensive PCI-X Course Info

You Will Learn:

  • How to design, debug and validate PCI-X devices
  • How to understand PCI-X timing diagrams
  • Design PCI-X bridges
  • Initialize PCI-X configuration space

Course Length: 2 days

Who Should Attend?

This in-depth course is hardware oriented, but is designed for both hardware and software engineers. The course contains practical examples of transactions on the link and describes error conditions to be aware of. It also covers all the rules required for a device to be specification compliant. This makes the course ideal for a system validation engineer who is evaluating an RTL-level, chip-level, system-level or system board-level design.

Course Outline:

  • PCI Shortcomings and Protocol Review
  • PCI and PCI-X 2.0 Device Types
  • Register Bus Concept
  • Sensing Device Types
  • PCI-X Configuration Registers
  • Bus Arbitration
  • Latency Rules
  • PCI-X Command Types
  • PCI-X Burst, Dword and Split Transactions
  • Early Transaction Termination
  • 64-bit Operations
  • Bridges and Relaxed Transaction Ordering
  • Error Detection Handling
  • Electrical Basics
  • Mode 2 Transfer Rates i.e. DDR and QDR Transactions
  • Error Correcting Codes (ECC)
  • Expanded Configuration Space
  • Device ID Messaging
  • 16 bit PCI-X

Recommended Prerequisites:

A basic understanding of PCI architecture is required.

Supplied Materials:

MindShares PCI-X System Architecture textbook
Author: Tom Shanley
Available through the MindShare Store and major bookstore outlets.



Santa Clara, CA: 2/23/2015
Santa Clara, CA: 2/23/2015
Santa Clara, CA: 2/27/2015

PCI-X System Architecture