x86 Firmware: BIOS


Let MindShare Bring BIOS to Life for You

This course focuses on the x86 PC’s traditional firmware design – Legacy BIOS and its POST (Power-On Self Test) sequence. Using actual BIOS code sequences it shows how built-in controllers are initialized, how PCI devices and functions are discovered and configured, how expansion ROMs are detected, validated and executed. The course also describes the various data tables that are created and populated during POST.

If you design, develop, test, or validate hardware or software platforms, ACPI, PCI, or firmware based expansion ROM capabilities that interact with BIOS, this course is for you!

NOTE: If you are interested in The Framework (Tiano) and UEFI, you will find our course on those topics here.

MindShare Courses On BIOS:

Course Name

Virtual Classroom

BIOS Essentials
2 days
Comprehensive UEFI Architecture
2 days
Hands-On Intel 32/64-bit x86 Architecture
5 days

5 days
Notify Me When Available
Intro to 32/64-bit x86 Architecture    
Show Me
Comprehensive x86 APIC Architecture Course
1 day

1 day

All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.

BIOS Essentials Course Info

You Will Learn:

  • The components of BIOS
  • Fundamentals of UEFI and The Framework (Tiano), Intel's approach to developing the next generation of PC firmware
  • Details of each step from power-on to operating system boot loader hand-off
  • What typical BIOS and Tiano code looks like
  • How legacy ISA devices are handled
  • How PCI devices are detected and configured
  • How ACPI power management is initialized
  • The firmware’s ongoing participation in running the PC
  • How to troubleshoot the boot sequence
  • The system software architecture

Course Length: 2 Days

Course Outline:

  • Firmware basics
    • Why do we need firmware?
    • What is UEFI, Tiano, and BIOS?
    • Where is the firmware?
  • Fundamental hardware concepts
    • Architecture of the original PC
    • What has been added
    • What has been removed
    • Architecture of today’s PCs
    • The cost of backward compatibility
    • Real and protected mode memory maps
    • The I/O port map
    • x86 CPU registers
    • Real mode capabilities
    • Making sense of Segmented Memory
  • The POST process
    • What happens before the POST (Power-On Self Test)?
    • Accessing the POST code
    • Reading configuration settings from NV-RAM
    • Chipset initialization
    • How video is initialized
    • How memory is tested
    • "Walking" the PCI buses to identify and initialize installed PCI devices and functions
    • Initialization of key legacy functions and devices
    • USB and IEEE1394 ("Firewire") initialization
    • Memory map after POST
    • The IVT (Interrupt Vector Table)
    • BDA and EBDA content and layout
    • Classic hand-off to operating system
    • ACPI system initialization – The RSDP and RSDT
  • A new way to boot
    • Why change?
    • What is UEFI and where does it fit in?
    • Major advantages over BIOS
    • Tiano - A phased approach to creating the UEFI
    • New driver models
    • The UEFI System Partition layout
    • The new boot process and sequence
    • Legacy support
  • Operating system configuration
    • The PC – A layered software architecture
    • Definition of the layers
    • Windows, Linux, and DOS boot sequences
    • Use of information collected by POST
  • Troubleshooting the boot sequence
    • Troubleshooting a PC – A three-step approach
    • Common problems
    • Beep codes
    • Monitoring POST-codes
    • Tools for development and manufacturing environments
      • ICE - In-Circuit Emulators
      • ITP - In-Target Probes
      • Logical Analyzers
      • JTAG and TAP interfaces

Recommended Prerequisites: This course is designed for technical managers, engineers and high-level technicians who need to increase their knowledge about the PC’s BIOS-based initialization and boot sequence.

Attendees are expected to have a technical background. Basic knowledge of assembly language programming, microprocessor technology, memory, and standard peripherals is expected.

Supplied Materials:

A copy of the presentation slides will be provided to the students. (presentation material is copyright protected by Techstream, Inc.)