Let MindShare Bring "Intel® Sandy/Ivy Bridge Processors" to Life for You
Ivy Bridge and Sandy Bridge processors are two recent additions to Intel’s x86 (Intel 64 and IA32) CPU family. Building on features introduced in the previous generation Nehalem processors, the second-generation 32nm Sandy Bridge and third-generation 22nm Ivy Bridge employ a new microarchitecture and bring significant enhancements in areas including CPU graphics, integrated IO, and power/thermal management.
A primary focus of the course is on CPU features and internal core hardware: instruction pipeline, caches, registers, execution units, and local APICs. CPU Uncore logic is also covered: graphics, main memory DRAM controller, system bus interfaces (DMI/QPI), and integrated IO (PCIe, etc.). An overview of the chipset (PCH) and common single-CPU and multi-CPU Ivy Bridge and Sandy Bridge platform topologies is also provided.
The course also introduces CPU operational modes, the IA32/64 instruction set, performance monitoring, processor virtualization, etc.--mainly in the context of CPU hardware required to support them. Note that other MindShare courses offer comprehensive coverage of the software architecture, platform chipsets, QPI, PCI Express, DRAM, virtualization, etc.
MindShare Related Courses On Intel Sandy/Ivy Bridge Processors:
All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.
Comprehensive Intel Sandy/Ivy Bridge Processor Course Info
You Will Learn:
- Place of Ivy Bridge and Sandy Bridge CPUs within the larger Intel x86 CPU family
- CPU and platform variants: mobile, desktop, workstation, server
- Architecture of the processor and differences between Ivy Bridge/Sandy Bridge
- Integrated graphics capabilities
- Power management
- Thermal management features
- Error handling
- Performance monitoring
- External CPU interfaces
- Processor virtualization support (VT-X)
Course Length: 4 days
- Part One: Intel IA32 CPU and Platform Background
o Intel 64 and IA32 lineage and Ivy Bridge/Sandy Bridge CPUs
o Intel platforms before Nehalem/Sandy Bridge/Ivy Bridge
- Part Two: Ivy Bridge/Sandy Bridge CPU Internal Architecture
o Cache Hierarchy:
o Instruction Pipeline
o Integrated Graphics
o Ivy Bridge/Sandy Bridge Platform Examples
- Part Four: Processor Operational Modes
o Legacy Modes
o IA32e Modes
- Part Five: Address Generation
o Real Mode Segmentation
o Protected Mode Segmentation and Paging
o Impact of IA32e 64-bit extensions
- Part Six: Interrupt Handling
o CPU Local APICs and Chipset IOAPICs
o Message Signaled Interrupt (MSI) Delivery
o Interrupt servicing
- Part Seven: CPU Management Topics
o Power management
o Thermal management
o System Management Mode (SMM)
o Error handling and Machine Check Architecture (MCA)
o Performance Monitoring
o Microcode Update
- Part Eight: Overview of External CPU Interfaces
o Direct Media Interface (DMI)
o QuickPath Interconnect (QPI)
o Integrated Memory Controller (IMC) and DRAM channels
o Platform Environmental Control Interface (PECI)
- Part Nine: Processor Virtualization (VT-x) support
Recommended Prerequisites: Basic understanding of Computer Architecture
MindShare’s x86 Instruction Set Architecture Book or eBook.
Author: Tom Shanley
Publisher: MindShare Press
Available through the MindShare Store and major bookstore outlets.
Students will be provided with an electronic version of the slides used in class.