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InfiniBand Network Architecture
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Technical Titles
FireWire System Architecture (2nd Edition)
HyperTransport 3.1 Interconnect Technology
HyperTransport System Architecture
InfiniBand Network Architecture
ISA System Architecture (3rd Edition)
PCI Express System Architecture
PCI Express Technology 3.0
PCI System Architecture (4th Edition)
PCI-X System Architecture
SAS Storage Architecture
SATA Storage Technology
The Unabridged Pentium 4
Universal Serial Bus System Architecture
USB 3.0 Technology
x86 Instruction Set Architecture

Historical Titles
Heaven's Favorite - Book One Ascent: The Rise of Chinggis Khan
Heaven's Favorite - Book Two Dominion: Dawn of the Mongol Empire




InfiniBand Network Architecture

Author(s): Tom Shanley
Publisher: Addison Wesley
Pages: 1208
Retail Price: $74.99

Book currently Out of Stock, please call 1-575-373-0336 for more info.


"A must-have PC architecture reference set."
     - PC Magazine's 'Read Only' Column

InfiniBand utilizes high-speed serial technology to interconnect data center elements. Each link consists of a signal pair that transfers information in both directions simultaneously at 2.5Gb/s. To increase throughput even more, four or twelve pairs can be implemented, yielding transfer rates of 312.5MB/s, 12.5GB/s, or 37.5GB/s.

Unlike other networking technologies, InfiniBand permits local and remote application software entities to perform memory-to-memory transfers without the intervention of the processor. This frees up most of the processor’s bandwidth to deal with computational problems. The architecture provides increased reliability, better sharing of data, and built-in security. InfiniBand Network Architecture provides a detailed description of this networking technology from both the hardware and software perspective.

Key Topics:

  • Basic Terms and Concepts
  • Physical Characteristics
  • Attributes and Managers
  • Discovery
  • Subnet Administrator (SA)
  • QP Message Transfer Mechanism
  • QP Creation and Operation
    • QP Verbs and QP State Machine
    • WRs, WQEs, and CQEs
    • Asynchronous Events/Errors
  • Detailed Description of Transport Services
    • RC Transport Service
    • UC Transport Service
    • RD Transport Service
    • UD Transport Service
    • Raw Transport Service Types
    • Multicasting
    • Automatic Path Migration (APM)
    • Static Rate Control
  • Send/Receive Operations
  • Division of Labor
  • Subnet-Local Addressing
  • Global Addressing
  • Connection Establishment
  • Protection Mechanisms
    • Memory Protection
    • Other Protection Mechanisms
  • Non-IBA Packet Tunneling
  • Automatic Path Migration (APM)
  • Link and Physical Layer Descriptions
    • Detailed Description of Link Layer
    • Detailed Physical Layer Description
  • The SM and SA
    • The SMI
    • Detailed Description of MADs
    • SM Methods and Attributes
    • Multiple SMs
    • Discovery
    • The GSI
    • Detailed Description of SA
  • General Services
    • Baseboard Management
    • Performance Management
    • Communications Management
    • Device Management

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About the Authors

Tom Shanley, president of MindShare, Inc., is one of the world's foremost authorities on computer system architecture. In the course of his career, he has trained thousands of engineers in hardware and software design.