UCIe Fundamentals eLearning Course

Instructor(s): Ravi Budruk

Equivalent of: 2-day course

Subscription Length: 120 days

$595

Course price

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What's Included

Modules slides Course completion certificate
UCIe eLearning modules
(unlimited access for 120 days)
PDF of Course Slides
(yours to keep, does not expire)
Course Completion Certificate
(boost your resume/CV)

You Will Learn

  • UCIe system architecture used for die-to-die communication including use of UCIe retimers
  • UCIe for tunneling PCIe, CXL and other protocols in raw mode
  • UCIe port design constituting Protocol, Die-to-Die Adapter, Logical and Electrical Physical Layers
  • Sideband interface usage and protocol
  • Software view of UCIe when paired with PCIe or CXL protocol layers
  • UCIe Interface (RDI and FDI) architecture between the Die-to-Die Adapter layer and Physical layer.

Course Description

MindShare’s UCIe Fundamentals course provides a solid foundation to understanding die-to-die architecture and use of UCIe retimers to extend connectivity beyond the package. The course describes port architecture details including protocol layer, die-to-die adapter layer, logical physical layer and electrical physical layer. We describe single and multi-module configurations. In addition, the course describes the sideband architecture details. Sideband interface is used for back-channel Link training, access to registers, Link management packets and parameter exchanges with remote Link partner. UCIe register architecture and the mechanism by which UCIe-aware SW discovers UCIe capability is described. An optional section describes a Raw Die-to-Die Interface (RDI) and Flit-aware Die-to-Die Interface (FDI) between the die-to-die adapter layer and physical layer.

Course Content

Module 1: Introduction and Table of Contents
Introduction and Table of Contents

17min to complete

Module 2a: UCIe Features and Architecture Overview
Features and Architecture Overview

28min to complete

Recommended Prerequisites

A good working knowledge of PCI Express (PCIe) and Compute Express Link (CXL) is a must. Computer architecture fundamentals. Some knowledge of Intel, AMD or Arm processor architectures.

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