[{"data":1,"prerenderedAt":1162},["ShallowReactive",2],{"GET-live-training-course/grouped-courses-by-category-{}-{}":3},{"IO Buses":4,"Memory Technology":505,"Virtualization Technology":580,"Storage Technology":666,"ARM Architecture":835,"x86 Architecture":1049},[5,173,194,268,283,301,317,353,387,455,472],{"id":6,"name":7,"description":8,"about":9,"you_will_learn":10,"prerequisites":11,"is_active":12,"modified_at":13,"course_outline":14,"created_at":15,"updated_at":16,"duration":17,"category_id":18,"order":19,"thumbnail":20,"slug":21,"old_live_courses_id":22,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":23,"meta_keywords":24,"meta_description":25,"training_materials":26,"category":27,"elearning_courses":31},701,"PCIe - PCI Express","\u003Cp>MindShare's PCI Express System Architecture course starts with a high-level view of the technology to provide the big-picture context and then drills down into the details for each topic, providing a thorough understanding of the hardware and software protocols.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>The course describes additional features added to the architecture when moving through the PCIe specification revisions from 1.1 all the way to the latest 6.2. There are a large number of features and optional behaviors described in the PCIe spec. MindShare can customize the course to cover the topics that are most important for your group. Use the course outline below as a guide to request topics you want covered or removed. The table below contains a list of suggested course customizations.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"PCI Express\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>PCI Express features and capabilities\u003C/li>\r\n\u003Cli>The definition and responsibilities of each of the layers in the interface\u003C/li>\r\n\u003Cli>The PCIe packet-based transaction protocol details\u003C/li>\r\n\u003Cli>The error detection, reporting and possible correction mechanisms\u003C/li>\r\n\u003Cli>The address space and packet-routing methods used\u003C/li>\r\n\u003Cli>How the various power management techniques work\u003C/li>\r\n\u003Cli>The details of the configuration registers that provide control and status visibility to software\u003C/li>\r\n\u003Cli>Software enumeration process\u003C/li>\r\n\u003Cli>The process of transmitter equalization necessary to operate at 8.0GT/s, 16.0GT/s and 32.0GT/s\u003C/li>\r\n\u003Cli>The details of the LTSSM including the concepts important for each state\u003C/li>\r\n\u003Cli>PAM4 signaling\u003C/li>\r\n\u003Cli>Flit Mode behavior\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>For SRIOV and ATS related topics, which are now incorporated into the PCIe base spec, please request our 3-day \u003Ca href=\"../../live-training-course/io-virtualization-on-intel-platforms\">IO Virtualization for Intel Platforms\u003C/a> course or our \u003Ca href=\"../../live-training-course/io-virtualization-on-arm-platforms\">IO Virtualization for ARM Platforms\u003C/a> course as these topics are \u003Cstrong>NOT \u003C/strong>covered in this standard 5-day PCIe course.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>For PCIe Security related topics, please request our dedicated 3-day \u003Ca href=\"../../live-training-course/pcie-security\">PCIe Security\u003C/a> as these topics are \u003Cstrong>NOT \u003C/strong>covered in this standard 5-day PCIe course.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>PIPE related topics are also \u003Cstrong>NOT\u003C/strong> covered but can be requested.\u003C/p>","\u003Cp>\u003Cspan class=\"sectionsubhead\">None\u003C/span>\u003C/p>",true,null,"\u003Ctable style=\"border-collapse: collapse; border-spacing: 0px; border: 1px solid rgb(0, 0, 0); width: 100%; height: 3085.01px;\" cellspacing=\"0\" cellpadding=\"5\">\r\n\u003Ctbody>\r\n\u003Ctr style=\"height: 0.5px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; text-align: center; border-style: solid; border-color: rgb(0, 0, 0); height: 62.2812px; width: 40%;\" colspan=\"2\">\r\n\u003Cdiv style=\"max-height: 40px;\">Topic\u003C/div>\r\n\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); font-weight: bold; overflow-wrap: break-word; text-align: center; height: 62.2812px; border-color: rgb(0, 0, 0); border-style: solid; width: 20%;\">5-day Class\u003Cbr>PCIe 7.0\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); font-weight: bold; overflow-wrap: break-word; text-align: center; border-color: rgb(0, 0, 0); border-style: solid; width: 20%;\">4-day Class\u003Cbr>PCIe 6.x / 7.0 Update\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); font-weight: bold; overflow-wrap: break-word; text-align: center; height: 62.2812px; border-color: rgb(0, 0, 0); border-style: solid; width: 20%;\">5-day Class\u003Cbr>PCIe 5.0\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px; width: 40%;\" colspan=\"2\">PCI Architecture Background Foundation\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">PCI concepts important for understanding PCIe\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(244, 204, 204); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 89.5624px; width: 20%;\" rowspan=\"4\">\r\n\u003Cdiv style=\"max-height: 80px;\">pre-class eLearning\u003C/div>\r\n\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Physical Address Spaces\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Traffic Types (System Memory, PIO and DMA)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Typical System Transactions (NVMe Example)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">PCI Express Features and Architecture Overview\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Layered Architecture\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(244, 204, 204); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 89.5624px; width: 20%;\" rowspan=\"4\">\r\n\u003Cdiv style=\"max-height: 80px;\">pre-class eLearning\u003C/div>\r\n\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">ARM example topology\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">TLP, DLLP and Ordered Set Packet Format Overview\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Protocol Overview\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">Configuration Overview\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Legacy and Enhanced Configuration Access Mechanism (ECAM)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(244, 204, 204); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 67.1718px; width: 20%;\" rowspan=\"3\">\r\n\u003Cdiv style=\"max-height: 80px;\">pre-class eLearning\u003C/div>\r\n\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Type 0 and Type 1 Headers, Capability and Extended Capability Structures\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Bus Enumeration\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">refresher\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">Address Space and Transaction Routing\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Clarification of Memory space\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(244, 204, 204); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 134.344px; width: 20%;\" rowspan=\"6\">\r\n\u003Cdiv style=\"max-height: 140px;\">pre-class eLearning\u003C/div>\r\n\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">System memory vs MMIO\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Prefetchable vs Non-prefetchable\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">IO space\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Setting up the BARs as well as the Base and Limit registers\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Switch Routing Mechanism\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">TLP Format Details\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Normal TLP fields\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">refresher\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">TLP Prefixes\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">10-bit Tags\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">PCI-SIG Vendor-Defined Messages\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">Quality of Service and Arbitration\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">TC/VC Mapping\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">overview\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">VC Arbitration\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">overview\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Port Arbitration\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">overview\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Multi-function Arbitration\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">overview\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">Flow Control\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Flow Control Protocol\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">refresher\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Scaled Flow Control\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Link Feature Exchange\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Flow Control Initialization\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Runtime Flow Control Update Mechanism\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">Transaction Ordering\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Simplified Ordering Table\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">overview\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Relaxed and ID-Based Ordering\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">overview\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">DLLP Format Details\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">DLLPs\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">NOP & Data Link Feature DLLPs\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">refresher\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">ACK / NAK Protocol\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">TLP Error Recovery Mechanism\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">refresher\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Simplified Replay Timer\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Examples of Numerous Error Scenarios\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Nullified Packets and Cut-Through Mode Switches\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">Physical Layer Logic (2.5GT/s and 5.0GT/s)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Block Diagram\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Ordered Sets\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">refresher\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Byte Striping/Unstriping\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Scrambling/Unscambling\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">8b/10b Encoding/Decoding\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Serializing/Deserializing\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">Physical Layer Logic (8.0GT/s, 16.0GT/s and 32.0GT/s)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">128b/130b Encoding/Decoding\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Control SKPs\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Ordered-Set Blocks and Data Blocks\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Data Streams and Packet Framing\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Data Parity Checking\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">16.0 & 32.0 GT/s Data Parity Checking\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Precoding\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">Physical Layer Electrical (all speeds)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Differential Tx / Rx\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">2.5GT/s and 5.0GT/s De-emphasis\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">8.0GT/s, 16.0GT/s and 32.0GT/s Equalization Concept\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">refresher\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Rx Equalization\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">overview\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Electrical Conditions for different Link States\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Spread Spectrum Clocking (SSC)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">overview\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Separate Refclk Independent SSC (SRIS)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">overview\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">Link Initialization and Training (LTSSM)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Detect, Polling, Configuration, L0 States\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">refresher\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Recovery: Link Speed Change\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Recovery: Equalization Process\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">16.0 GT/s Equalization and Config Structures\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Negotiation for skipping parts or all of Tx Equalization\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">32.0 GT/s Equalization and Config Structures\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Recovery: Link Width Change\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">L0s, L1, L2, Hot Reset, Link Disable and Loopback States\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Modified TS1 / TS2s and Alternate Protocol Negotiation\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">Interrupt Support\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Legacy Interrupt Handling\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">MSI Interrupts\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">32-bit MSI Data\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">MSI-X Interrupts\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">Error Detection and Handling\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Correctable, Non-Fatal and Fatal Errors\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Advisory Non-Fatal Errors\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Error Subclass field for Correctable Error Messages\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Advanced Error Reporting (AER)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">Power Management\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Device Power States\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Link Power States\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">L1 Substates\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Active State Power Management (ASPM) - hardware controlled\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Software Controlled Power Management\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Power Management Events (PME, Beacon and #WAKE)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Dynamic Power Allocation (DPA)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Optimized Buffer Flush Fill (OBFF)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Latency Tolerance Reporting (LTR)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">System Resets\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Conventional Reset Mechanisms: Cold, Warm and Hot Reset\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Function Level Reset (FLR)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">1b/1b Physical Layer (64GT/s and 128GT/s)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">PAM4\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Precoding, Gray Coding and Forward Error Correction (FEC)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">LTSSM Updates (TS0s, Tx EQ changes, entering Flit Mode, etc.)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">Flit Mode\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Flit Format\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Error Correction and Flit Retry (Standard vs Selective)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">DLP Bytes in Flit and Flit Types\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Flow Control (Dedicated vs Shared)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">TLP Structure (Header Base, OHC, TLP Trailer, etc.)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Segments\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">L0p\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">X\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; font-weight: bold; overflow-wrap: break-word; height: 22.3906px;\" colspan=\"2\">Miscellaneous PCIe Features\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Retimers (introduced in 4.0)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">overview\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">refresher\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">overview\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Lane Margining (introduced in 4.0)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">overview\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Flattening Portal Bridge (FPB) (introduced in 4.0)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">overview\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Hierarchy ID Reporting (introduced in 4.0)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Designated Vendor-Specific Extended Capability (DVSEC) (introduced in 4.0)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Enhanced Allocation (introduced in 4.0)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Emergency Power Reduction State (introduced in 4.0)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">System Firmware Intermediary Support (introduced in 5.0)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\">overview\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"vertical-align: middle; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204);\">Unordered IO (UIO) (introduced in 6.1)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); width: 20%;\">overview\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); width: 20%;\">overview\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"vertical-align: middle; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204);\">PCIe Management Interface (PCIe-MI) (introduced in 6.4)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); width: 20%;\">overview\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); width: 20%;\">overview\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Hot Plug\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Power Budgeting\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Multi-Casting\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Protocol Multiplexing (PMUX)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Resizable BARs\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Downstream Port Containment (DPC) and Enhanced DPC (eDPC)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Lightweight Notification (can be used for lightweight cache coherency)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Process Address Space ID (PASID)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border: 1px solid rgb(204, 204, 204); height: 22.3906px;\">Precision Time Measurement (PTM)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border: 1px solid rgb(204, 204, 204); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 22.3906px;\">\r\n\u003Ctd style=\"vertical-align: middle; height: 22.3906px; width: 20px;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; overflow-wrap: break-word; border-top: 1px solid rgb(204, 204, 204); border-right: 1px solid rgb(204, 204, 204); border-left: 1px solid rgb(204, 204, 204); border-image: initial; border-bottom: rgb(0, 0, 0); height: 22.3906px;\">Device Readiness Status (DRS) and Function Readiness Status (FRS)\u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border-top: 1px solid rgb(204, 204, 204); border-right: 1px solid rgb(204, 204, 204); border-left: 1px solid rgb(204, 204, 204); border-image: initial; border-bottom: rgb(0, 0, 0); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border-top: 1px solid rgb(204, 204, 204); border-right: 1px solid rgb(204, 204, 204); border-left: 1px solid rgb(204, 204, 204); border-image: initial; border-bottom: rgb(0, 0, 0); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003Ctd style=\"vertical-align: middle; background-color: rgb(226, 239, 217); overflow-wrap: break-word; text-align: center; border-top: 1px solid rgb(204, 204, 204); border-right: 1px solid rgb(204, 204, 204); border-left: 1px solid rgb(204, 204, 204); border-image: initial; border-bottom: rgb(0, 0, 0); height: 22.3906px; width: 20%;\"> \u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>","2023-12-04T15:27:56.000000Z","2026-02-16T15:43:12.000000Z","4 - 5 days",11,0,"public/live_training_courses/thumbnails/live_training_course_701_thumbnail_1747666629.png","pci-express",43,"PCI Express Training","pci express, pcie, training, tutorial","pcie training","\u003Cul>\r\n\u003Cli>PDF of course slides\u003C/li>\r\n\u003Cli>\"\u003Ca href=\"../../ebook/pci-express-technology-30\">PCI Express Technology\u003C/a>\" eBook (covers PCIe 3.0)\u003C/li>\r\n\u003Cli>Fundamentals of \u003Ca href=\"../../elearning-course/fundamentals-of-pci-express-elearning-course\">PCI Express eLearning course\u003C/a> (needed for pre-work before class)\u003C/li>\r\n\u003Cli>Optional add-on: \u003Ca href=\"../../elearning-course/pcie5-elearning-course\">PCI Express 5.0 eLearning course\u003C/a> (discounted pricing applies)\u003C/li>\r\n\u003Cli>Optional add-on: \u003Ca href=\"../../elearning-course/pcie6-update-elearning-course\">PCIe6 Update eLearning course\u003C/a> (discounted pricing applies)\u003C/li>\r\n\u003C/ul>",{"id":18,"title":28,"created_at":29,"updated_at":30,"order":19},"IO Buses","2024-01-15T12:05:10.000000Z","2024-12-26T15:14:03.000000Z",[32,60,79,98,119,135,156],{"id":33,"name":34,"about":35,"instructor_fullname":36,"instructor_email":37,"price":38,"price_arbor":38,"created_at":39,"updated_at":40,"you_will_learn":41,"equivelent_of":42,"subscription_length":43,"video_id":44,"is_active":12,"prerequisites":45,"modified_at":46,"order":47,"presentation_id":48,"slug":49,"course_category_id":50,"release_date":51,"old_product_id":52,"meta_description":53,"meta_keywords":54,"author_signature":55,"description":56,"meta_title":34,"whats_included":57,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":59},1710,"Fundamentals of PCI Express eLearning Course","\u003Cdiv>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"PCIe\" to Life for You\u003C/strong>\u003C/span>\u003C/div>","Mike Jackson","mike@mindshare.com","495","2024-11-13T22:48:50.000000Z","2025-07-30T15:53:16.000000Z","\u003Cdiv>\r\n\u003Cul>\r\n\u003Cli>Short background of PCI concepts important to PCIe\u003C/li>\r\n\u003Cli>Motivation for PCIe serial model\u003C/li>\r\n\u003Cli>Software view of the topology\u003C/li>\r\n\u003Cli>Definition and responsibilities of each layer in the PCIe interface\u003C/li>\r\n\u003Cli>PCIe transaction types and definitions\u003C/li>\r\n\u003Cli>The routing method used for each request and completion\u003C/li>\r\n\u003Cli>Roles of the Flow Control and ACK / NAK features\u003C/li>\r\n\u003Cli>Purpose and behavior of the logical blocks within the Physical Layer\u003C/li>\r\n\u003Cli>Error types and the associated levels of severity\u003C/li>\r\n\u003C/ul>\r\n\u003C/div>",1,120,37716,"\u003Cp>None.\u003C/p>","2025-07-17 17:05:46",5,272,"fundamentals-of-pci-express-elearning-course",147,"2024-11-15 06:00:00",248,"mindshare pci express fundamentals elearning","pci express, pcie, elearning, module, tutorial, training, online, on-demand, self-paced","Mike-Jackson","\u003Cp>This course provides a good overview of the basics of PCIe. This course is meant for people who want a general understanding of the PCIe architecture, but don't need to dive into the details.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/pciefund_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/pciefund_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PCIe Fundamentals eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",411,{"live_training_course_id":6,"elearning_course_id":33},{"id":61,"name":62,"about":63,"instructor_fullname":36,"instructor_email":37,"price":64,"price_arbor":64,"created_at":39,"updated_at":65,"you_will_learn":66,"equivelent_of":42,"subscription_length":43,"video_id":67,"is_active":12,"prerequisites":68,"modified_at":13,"order":69,"presentation_id":70,"slug":71,"course_category_id":50,"release_date":51,"old_product_id":72,"meta_description":73,"meta_keywords":74,"author_signature":55,"description":75,"meta_title":76,"whats_included":77,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":78},1748,"PIPE 6.0 - PHY Interface for PCI Express and more","\u003Cdiv>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"PIPE 6.0\" to Life for You\u003C/strong>\u003C/span>\u003C/div>","395","2025-10-31T13:14:21.000000Z","\u003Cul>\r\n\u003Cli>Signals and protocol associated with communication between the MAC layer (of PCIe, SATA, USB 3.1, USB4 and DisplayPort) and PHY layer\u003C/li>\r\n\u003Cli>Register definitions both in the MAC and PHY layers\u003C/li>\r\n\u003Cli>Signaling to support the PHY equalization process\u003C/li>\r\n\u003Cli>PCIe power state support\u003C/li>\r\n\u003Cli>USB and SATA operational modes\u003C/li>\r\n\u003C/ul>",37754,"\u003Cp>A basic understanding of PCI Express, SATA, USB 3.1/USB4 and DisplayPort protocols which serves as a\u003Cbr>basis to understanding the packets and signals that traverse the PIPE interface.\u003C/p>",6,490,"pipe-60-phy-interface-for-pci-express-and-more",762,"PIPE - Physical Interface for PCI Express and more","PIPE, pcie, usb4, thunderbolt, sata, displayport, eLearning","\u003Cp>PIPE 6.0 enables the development of PHYs for PCI Express, SATA, USB, DisplayPort, and USB4. Such PIPE compliant PHYs can be delivered as standalone ICs or as macrocell IPs for inclusion in ASICs. The course describes a standard interface between such a PHY and a Media Access Layer (MAC) & Link Layer ASIC. Two independently designed PHY and MAC ASICs/macrocell IPs will connect and work together as long as they meet the design requirements of PIPE 6.0. This course does not describe the internal design of a compliant PHY chip or higher layer protocol architecture. To understand PCIe, SATA or USB architecture, you would need to take one of MindShare’s other comprehensive architecture courses.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>The course covers PIPE interface operational behavior in PCIe, USB and SATA modes. Additionally, you will also learn the signaling protocol associated with the Link Training process, Equalization process and Lane Margining.\u003C/p>","PIPE 6.0 eLearning Course","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/pipe2020_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/pipe2020_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PCIe PIPE 6.0 eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":6,"elearning_course_id":61},{"id":80,"name":81,"about":82,"instructor_fullname":36,"instructor_email":37,"price":83,"price_arbor":83,"created_at":39,"updated_at":84,"you_will_learn":85,"equivelent_of":86,"subscription_length":43,"video_id":87,"is_active":12,"prerequisites":45,"modified_at":88,"order":89,"presentation_id":90,"slug":91,"course_category_id":50,"release_date":92,"old_product_id":93,"meta_description":94,"meta_keywords":94,"author_signature":55,"description":95,"meta_title":81,"whats_included":96,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":97},1755,"Core PCIe eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"PCIe\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","995","2026-10-22T16:26:43.000000Z","\u003Cdiv>\r\n\u003Cul>\r\n\u003Cli>PCI Express features and capabilities\u003C/li>\r\n\u003Cli>The definition and responsibilities of each of the layers in the interface\u003C/li>\r\n\u003Cli>How hardware-based automatic error detection and correction mechanism works\u003C/li>\r\n\u003Cli>The various additional levels of error detection and reporting\u003C/li>\r\n\u003Cli>The details of the packet-based protocol used by PCIe\u003C/li>\r\n\u003Cli>The address space and packet-routing methods used\u003C/li>\r\n\u003Cli>How the various power management techniques work\u003C/li>\r\n\u003Cli>Configuration register details that provide control and status visibility to software\u003C/li>\r\n\u003Cli>The purpose of equalization and how it is done in PCIe 3.0 and later\u003C/li>\r\n\u003C/ul>\r\n\u003C/div>",3,37761,"2026-10-22 16:26:43",4,502,"core-pcie-elearning-course","2024-11-16 06:00:00",808,"pcie, pci express, elearning, online training","\u003Cp>If you are going to take one course on PCI Express, this should be it. MindShare's PCIe eLearning course is an exhaustive tutorial on PCIe from the electrical PHY all the way up to software. It starts with a high-level view of the design to provide the big-picture context and then drills down into the details for each part of the design, providing a thorough understanding of the hardware and software protocols.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/pciecore_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/pciecore_slides.png\" alt=\"PDF of course slides\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/pcie3_cover_ds.png\" alt=\"img\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>Core PCIe eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PCI Express eBook\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":6,"elearning_course_id":80},{"id":99,"name":100,"about":101,"instructor_fullname":102,"instructor_email":103,"price":83,"price_arbor":83,"created_at":39,"updated_at":104,"you_will_learn":105,"equivelent_of":86,"subscription_length":43,"video_id":106,"is_active":12,"prerequisites":107,"modified_at":108,"order":19,"presentation_id":109,"slug":110,"course_category_id":50,"release_date":111,"old_product_id":112,"meta_description":113,"meta_keywords":114,"author_signature":115,"description":116,"meta_title":100,"whats_included":117,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":118},1761,"PCIe6 Update eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"PCIe6\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","Joe Winkles","joe@mindshare.com","2025-10-31T13:16:36.000000Z","\u003Cdiv>\r\n\u003Cul>\r\n\u003Cli>PAM4 signaling\u003C/li>\r\n\u003Cli>The need for Forward Error Correction\u003C/li>\r\n\u003Cli>Behavior of the Physical Layer at 64GT/s\u003C/li>\r\n\u003Cli>Flit format\u003C/li>\r\n\u003Cli>Ack/Nak protocol at the Flit level\u003C/li>\r\n\u003Cli>Shared vs Dedicated Flow Control Buffers\u003C/li>\r\n\u003Cli>TLP Format while in Flit Mode\u003C/li>\r\n\u003Cli>The need for Segments in some TLPs\u003C/li>\r\n\u003Cli>Benefits and operation of L0p\u003C/li>\r\n\u003C/ul>\r\n\u003C/div>",37767,"\u003Cp>A good understanding of PCIe 5.x is a requirement for this course since it only covers the new and different features introduced with PCIe6.\u003C/p>","2025-04-03 20:50:51",515,"pcie6-update-elearning-course","2023-10-05 05:00:00",853,"PCI Express 6.0 Update eLearning Course","pcie, pci express 6.0, gen6, flit mode, pam4, tutorial, eLearning","Joseph-Winkles","\u003Cdiv>This course is perfect for someone with a good understanding of PCIe 5.0, but is wanting to quickly understand the massive number of changes introduced in the PCIe 6.0 specification.\u003C/div>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/pcie6_update_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/pcie6_update_slides.png\" alt=\"img\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PCIe6 Update eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":6,"elearning_course_id":99},{"id":120,"name":121,"about":35,"instructor_fullname":102,"instructor_email":103,"price":122,"price_arbor":122,"created_at":39,"updated_at":123,"you_will_learn":124,"equivelent_of":86,"subscription_length":43,"video_id":125,"is_active":12,"prerequisites":126,"modified_at":127,"order":86,"presentation_id":70,"slug":128,"course_category_id":50,"release_date":129,"old_product_id":130,"meta_description":121,"meta_keywords":131,"author_signature":115,"description":132,"meta_title":121,"whats_included":133,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":134},1750,"Advanced PCIe eLearning Course","895","2026-10-22T18:55:05.000000Z","\u003Cul>\r\n\u003Cli>PCI Express features and capabilities\u003C/li>\r\n\u003Cli>The definition and responsibilities of each of the layers in the interface\u003C/li>\r\n\u003Cli>Physical Layer changes to support PCIe Gen3, Gen4 and Gen5 such as 128b/130b and Tx Equalization\u003C/li>\r\n\u003Cli>The link training process including changes made in rev 5.0 spec such as Alternate Protocol Negotiation\u003C/li>\r\n\u003Cli>The purpose of equalization and how it is done in PCIe 3.0 and later\u003C/li>\r\n\u003Cli>Features added to Rev 4.0 and Rev 5.0 spec such as Lane Margining, Retimers, System Firmware Intermediary\u003C/li>\r\n\u003C/ul>",37756,"\u003Cp>A solid understanding of PCIe 2.x is needed since this course only covers the deltas between 2.x and 5.0.\u003C/p>","2025-07-23 16:27:39","advanced-pcie-elearning-course","2024-11-14 06:00:00",774,"pcie tutorial, 128b/130b","\u003Cp> \u003Cspan style=\"color: rgb(108, 108, 108); font-size: 18px; font-weight: bold;\">Advanced PCI Express 3.x, 4.0 & 5.0 (w/ PIPE) eLearning Course Info\u003C/span>\u003C/p>\r\n\u003Cp> \u003Cspan style=\"color: rgb(255, 10, 10); font-size: 16px; font-weight: bold;\">Note: This course is a subset of the Comprehensive PCIe 5.0 eLearning course.\u003C/span>\u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(255, 10, 10); font-size: 16px; font-weight: bold;\"> Note: Purchase of this course includes the PIPE 6.0 eLearning course.\u003C/span>\u003C/p>\r\n\u003Cp>If you already understand PCIe protocol as described in the rev 2.0 specification and you need to understand spec additions from spec rev 3.0 onwards, this is the course to take. To serve as a refresher, the course starts with a high-level view of the design to provide the big-picture context. The course then drills down into design updates associated with Gen3, Gen4 and Gen5. We cover topics such as 128b/130b, Retimers, Lane Margining etc.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/pcie_adv_modules.png\" alt=\"PCIe Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/pcie_adv_slides.png\" alt=\"img\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg style=\"max-height: 150px;\" src=\"https://mindshare-prod.s3.amazonaws.com/public/ebook_covers/full_423.jpg\" alt=\"PCIe eBook\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>Advanced PCIe eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PCIe eBook\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume / CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":6,"elearning_course_id":120},{"id":136,"name":137,"about":138,"instructor_fullname":139,"instructor_email":140,"price":83,"price_arbor":83,"created_at":39,"updated_at":141,"you_will_learn":142,"equivelent_of":86,"subscription_length":43,"video_id":143,"is_active":12,"prerequisites":144,"modified_at":145,"order":146,"presentation_id":147,"slug":148,"course_category_id":50,"release_date":51,"old_product_id":149,"meta_description":150,"meta_keywords":151,"author_signature":152,"description":153,"meta_title":150,"whats_included":154,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":155},1762,"PCIe Security eLearning Course","\u003Cdiv>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"PCIe Security\" to Life for You\u003C/strong>\u003C/span>\u003C/div>","Paul Devriendt","paul@mindshare.com","2026-04-21T13:48:55.000000Z","\u003Cdiv>\r\n\u003Cul>\r\n\u003Cli>Threat models.\u003C/li>\r\n\u003Cli>STRIDE categories (spoofing, tampering, repudiation, information disclosure, repudiation, denial of service, elevation of privilege).\u003C/li>\r\n\u003Cli>System and PCIe overview, highlighting the areas we will discuss with respect to attacks.\u003C/li>\r\n\u003Cli>DMA attacks.\u003C/li>\r\n\u003Cli>Using the IOMMU to prevent DMA attacks, and the potential security holes with an IOMMU.\u003C/li>\r\n\u003Cli>Other DMA attack mitigations such as encrypted memory.\u003C/li>\r\n\u003Cli>Interrupt attacks.\u003C/li>\r\n\u003Cli>Using Interrupt Remapping to prevent interrupt attacks, and the security holes with interrupt remapping.\u003C/li>\r\n\u003Cli>The idea of mutable versus immutable, and why everything needs to be treated as mutable.\u003C/li>\r\n\u003Cli>Error reporting attacks.\u003C/li>\r\n\u003Cli>Switch attacks.\u003C/li>\r\n\u003Cli>The enhancements to the PCIe fabric and to manageability (CMA/SPDM/IDE)\u003C/li>\r\n\u003Cli>The boundaries of the protection from the enhancements, and possible paths to attacking such a secured system.\u003C/li>\r\n\u003C/ul>\r\n\u003C/div>",37768,"\u003Cp>PCIe knowledge is recommended but not required.\u003C/p>","2026-04-21 13:48:55",2,514,"pcie-security-elearning-course",854,"PCI Express Security eLearning Course","pcie, pci express, security, ide, encryption, tutorial, elearning","Paul-Devriendt","\u003Cdiv>This PCIe focused security course starts by looking at some of the simpler forms of attacks such as DMA, and some of the defenses again those attacks (IOMMU), and also some of the holes in these defense mechanisms. We then move onto looking at some of the additional features added to help protect the fabric (such as source validation in Access Control Services), and then onto the newest features for evaluating trust, link encryption, and point-to-point encryption. We also look at the supported for a TEE (Trusted Execution Environment) VM.\u003C/div>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/pcie_security_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/pcie_security_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PCIe Security eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":6,"elearning_course_id":136},{"id":157,"name":158,"about":159,"instructor_fullname":36,"instructor_email":37,"price":160,"price_arbor":160,"created_at":39,"updated_at":161,"you_will_learn":162,"equivelent_of":69,"subscription_length":43,"video_id":163,"is_active":12,"prerequisites":164,"modified_at":165,"order":42,"presentation_id":70,"slug":166,"course_category_id":50,"release_date":167,"old_product_id":168,"meta_description":158,"meta_keywords":169,"author_signature":55,"description":170,"meta_title":158,"whats_included":171,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":172},1749,"PCIe 5.0 eLearning Course","\u003Cdiv>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"PCIe 5.0\" to Life for You\u003C/strong>\u003C/span>\u003C/div>","1595","2026-10-22T16:35:30.000000Z","\u003Cul>\r\n\u003Cli>PCI Express features and capabilities\u003C/li>\r\n\u003Cli>The definition and responsibilities of each of the layers in the interface\u003C/li>\r\n\u003Cli>How hardware-based automatic error detection and correction mechanism works\u003C/li>\r\n\u003Cli>The various additional levels of error detection and reporting\u003C/li>\r\n\u003Cli>The details of the packet-based protocol used by PCIe\u003C/li>\r\n\u003Cli>The address space and packet-routing methods used\u003C/li>\r\n\u003Cli>How the various power management techniques work\u003C/li>\r\n\u003Cli>Configuration register details that provide control and status visibility to software\u003C/li>\r\n\u003Cli>The purpose of equalization and how it is done in PCIe 3.0 and later\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>If you are going to take one course on PCI Express, this should be it. MindShare's PCIe eLearning course is an exhaustive tutorial on PCIe from the electrical PHY all the way up to software. It starts with a high-level view of the design to provide the big-picture context and then drills down into the details for each part of the design, providing a thorough understanding of the hardware and software protocols.\u003C/p>",37755,"\u003Cp>None\u003C/p>","2026-10-22 16:35:30","pcie5-elearning-course","2024-11-13 06:00:00",765,"pcie, pci express, elearning, training, online tutorial","\u003Cp>This course is hardware-oriented, but is suitable for both hardware and software engineers because the configuration registers used to control the hardware are covered in detail. The course is ideal for RTL-, chip-, system- or system board-level design engineers who need a broad understanding of PCI Express. Because the course contains practical examples of transactions on the various bus interfaces, the course is also suitable for chip-level and board-level validation engineers.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/pcie5_modules.png\" alt=\"\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/pcie5_slides.png\" alt=\"PDF Slides Thumbnail\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg style=\"max-height: 150px;\" src=\"https://mindshare-prod.s3.amazonaws.com/public/ebook_covers/full_423.jpg\" alt=\"PCIe eBook\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PCIe 5.0 eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PCIe eBook\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume / CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":6,"elearning_course_id":157},{"id":174,"name":175,"description":176,"about":177,"you_will_learn":178,"prerequisites":179,"is_active":12,"modified_at":13,"course_outline":180,"created_at":181,"updated_at":182,"duration":183,"category_id":18,"order":42,"thumbnail":184,"slug":185,"old_live_courses_id":13,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":186,"meta_keywords":187,"meta_description":188,"training_materials":189,"category":190,"elearning_courses":191},744,"PCIe Security","\u003Cp>The threat model for PC systems has changed dramatically over the years. Inserting a card (e.g., AGP, PCI, PCI-X, PCIe) was an action that required physical access to the system board, and the system could be protected with a case lock and intrusion alarms. It was regarded that a plug-in card that the user chose to install in their system should therefore be trusted. There have been many changes to this simple picture that result in a very different threat model today, for example:\u003C/p>\r\n\u003Cul>\r\n\u003Cli>External connectors that are DMA capable, such as Thunderbolt and the USB-C connector, which makes internal data accessible without needing to open the case.\u003C/li>\r\n\u003Cli>The ability of devices to hide their purpose, such as a device that appears to be a USB-C charger, but that has malicious capability hidden such as wireless networking capability (a Trojan).\u003C/li>\r\n\u003Cli>Downloadable firmware that is used to implement devices (known as soft devices) that used to be hard-coded.\u003C/li>\r\n\u003Cli>Counterfeit devices and components in the supply chain.\u003C/li>\r\n\u003Cli>Malicious actors building back doors into genuine devices.\u003C/li>\r\n\u003Cli>Virtualization, where we have multiple operating systems sharing the same platform.\u003C/li>\r\n\u003Cli>Greatly increasing complexity opening the door to design errors and implementation bugs.\u003C/li>\r\n\u003Cli>Sophisticated attackers with resources to search for the smallest hole.\u003C/li>\r\n\u003Cli>Increased rewards for a successful system attack, whether monetary (perhaps from the theft of crypto), or from destructive intent to a target (such as a power grid).\u003C/li>\r\n\u003Cli>Increasing connectivity of systems, such that a platform that was isolated and therefore secure, is now online and attackable from the other side of the world.\u003C/li>\r\n\u003Cli>Device portability, such that physical access to a system in a secure data center is not required, the target is a laptop or phone class of system.\u003C/li>\r\n\u003Cli>Growth of sensitive data on devices, such that the system attacker might be a “good guy” such as law enforcement trying to prevent a terrorist attack.\u003C/li>\r\n\u003Cli>An increasing complex world where the definition of “good guy” and “bad guy” are not clear.\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>We have moved from a world where a simple I/O device installed in a system was reasonably safe, to a world where literally everything could be used as a possible attack vector. The weak points may come from design limitations, from designs being used outside of the environment that they were intended for, and from implementation defects.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>The simple attack over PCIe has moved from being:\u003C/p>\r\n\u003Cul>\r\n\u003Cli>a simple DMA read/write of system memory, or\u003C/li>\r\n\u003Cli>an errant interrupt causing execution of unintended code\u003C/li>\r\n\u003C/ul>\r\n\u003Cp>to being a question of the inability to trust the PCIe fabric itself. For example, has an attacker been able to switch on the debug facilities in a firmware-implemented PCIe switch, and use the switch as a malicious TLP generator? (The answer is Yes).\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>This PCIe focused security course starts by looking at some of the simpler forms of attacks such as DMA, and some of the defenses again those attacks (IOMMU), and also some of the holes in these defense mechanisms. We then move onto looking at some of the additional features added to help protect the fabric (such as source validation in Access Control Services), and then onto the newest features for evaluating trust, link encryption, and point-to-point encryption. We also look at the supported for a TEE (Trusted Execution Environment) VM.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>This is not a platform security course as there are many other topics of relevance to security that we will not discuss, such as UEFI, hypervisors, operating systems, processor security features, etc.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>This class looks at potential attacks on “legacy” PCIe and some of the mitigations (ACS, IOMMU, etc), and then explores the newer features (CMA, IDE, SPDM, TDISP, etc). This class is based on the ECNs to PCIe 4.0 and 5.0, and also covers the changes from PCIe 6.0 and 6.1.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cstrong>\u003Cspan style=\"color: rgb(186, 55, 42);\">All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/span>\u003C/strong>\u003C/p>","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"PCIe Security\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>Threat models.\u003C/li>\r\n\u003Cli>STRIDE categories (spoofing, tampering, repudiation, information disclosure, repudiation, denial of service, elevation of privilege).\u003C/li>\r\n\u003Cli>System and PCIe overview, highlighting the areas we will discuss with respect to attacks.\u003C/li>\r\n\u003Cli>DMA attacks.\u003C/li>\r\n\u003Cli>Using the IOMMU to prevent DMA attacks, and the potential security holes with an IOMMU.\u003C/li>\r\n\u003Cli>Other DMA attack mitigations such as encrypted memory.\u003C/li>\r\n\u003Cli>Interrupt attacks.\u003C/li>\r\n\u003Cli>Using Interrupt Remapping to prevent interrupt attacks, and the security holes with interrupt remapping.\u003C/li>\r\n\u003Cli>The idea of mutable versus immutable, and why everything needs to be treated as mutable.\u003C/li>\r\n\u003Cli>Error reporting attacks.\u003C/li>\r\n\u003Cli>Switch attacks.\u003C/li>\r\n\u003Cli>The enhancements to the PCIe fabric and to manageability (CMA/SPDM/IDE).\u003C/li>\r\n\u003Cli>The boundaries of the protection from the enhancements, and possible paths to attacking such a secured system.\u003C/li>\r\n\u003C/ul>","\u003Cp>The MindShare PCIe 5.0 / 6.x class or equivalent knowledge is recommended. Basic knowledge of processor (Intel/AMD/ARM) and computer architecture.\u003C/p>","\u003Cul>\r\n\u003Cli>Early systems. The necessity for the proliferation of DMA engines. The necessity for interrupts.\u003C/li>\r\n\u003Cli>Address spaces, such that memory may be readable/writeable memory, or may be I/O space.\u003C/li>\r\n\u003Cli>DMA attacks, copying or modifying memory.\u003C/li>\r\n\u003Cli>Malicious hardware entering the supply chain.\u003C/li>\r\n\u003Cli>Mutable versus immutable, and the surprises.\u003C/li>\r\n\u003Cli>Impersonation (where a device pretends to be something else).\u003C/li>\r\n\u003Cli>Convergence and convenience (USB-C for charging but also for attacking).\u003C/li>\r\n\u003Cli>Use of an IOMMU to prevent DMA attacks.\u003C/li>\r\n\u003Cli>IOMMU issues at boot time versus runtime, setup and configuration of the IOMMU, and the ACPI tables.\u003Cbr>PCIe defined ATC as a bypass for the IOMMU.\u003C/li>\r\n\u003Cli>PCIe defined ACS as a mitigation for the ATC.\u003C/li>\r\n\u003Cli>Error reporting from devices.\u003C/li>\r\n\u003Cli>Congestion based attacks.\u003C/li>\r\n\u003Cli>Interrupt based attacks, with the interrupt remapping as mitigation.\u003C/li>\r\n\u003Cli>NMI and SMI bypass to the interrupt remapping.\u003C/li>\r\n\u003Cli>Fabric based attacks (watching links, changing packets, injecting packets) from the switch.\u003C/li>\r\n\u003Cli>Fabric based attacks from retimers.\u003C/li>\r\n\u003Cli>The need for\r\n\u003Cul>\r\n\u003Cli>Establishing trust (host knowing the device, device knowing the host).\u003C/li>\r\n\u003Cli>Key exchange.\u003C/li>\r\n\u003Cli>Encrypted links.\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Keys, certificates and encryption background\r\n\u003Cul>\r\n\u003Cli>public and private keys\u003C/li>\r\n\u003Cli>encryption standards\u003C/li>\r\n\u003Cli>certificates\u003C/li>\r\n\u003Cli>X.509 trust model\u003C/li>\r\n\u003Cli>AES-GCM\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>IDE (Integrity and Data Encryption)\r\n\u003Cul>\r\n\u003Cli>Link security threat model\u003C/li>\r\n\u003Cli>Exposures not covered by the threat model\u003C/li>\r\n\u003Cli>Link IDE\u003C/li>\r\n\u003Cli>The switch as an attack vector\u003C/li>\r\n\u003Cli>Selective IDE\u003C/li>\r\n\u003Cli>Mixing Link and Selective IDE\u003C/li>\r\n\u003Cli>Stream establishment\u003C/li>\r\n\u003Cli>Side channel attacks via unencrypted headers\u003C/li>\r\n\u003Cli>IDE TLPs\u003C/li>\r\n\u003Cli>TLP Encryption\u003C/li>\r\n\u003Cli>TLP Aggregation\u003C/li>\r\n\u003Cli>IDE Extended Capability structure\u003C/li>\r\n\u003Cli>IDE Sub-Streams\u003C/li>\r\n\u003Cli>Power management and resets\u003C/li>\r\n\u003Cli>Error conditions and error reporting\u003C/li>\r\n\u003Cli>Partial header encryption with PCIe 6.0\u003C/li>\r\n\u003Cli>Segments with PCIe 6.0\u003C/li>\r\n\u003Cli>Link and selective IDE with Flit Mode (PCIe 6.0)\u003C/li>\r\n\u003Cli>IDE may not be sufficient, what else may be needed\r\n\u003Cul>\r\n\u003Cli>key exchange\u003C/li>\r\n\u003Cli>trust\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>PCI-SIG and DMTF Specifications overview\u003C/li>\r\n\u003Cli>TCG (Trusted Computing Group) background\r\n\u003Cul>\r\n\u003Cli>root of trust\u003C/li>\r\n\u003Cli>attestation\u003C/li>\r\n\u003Cli>system startup\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>CMA/SPDM (Component Measurement and Authentication / Security Protocol and Data Model\r\n\u003Cul>\r\n\u003Cli>multiple paths to PCIe devices (SMbus, I2C)\u003C/li>\r\n\u003Cli>threat model\u003C/li>\r\n\u003Cli>mutable and immutable objects\u003C/li>\r\n\u003Cli>authentication\u003C/li>\r\n\u003Cli>TLS (Transport Layer Security) background\u003C/li>\r\n\u003Cli>attestation\u003C/li>\r\n\u003Cli>recommended flow\u003C/li>\r\n\u003Cli>handling versions\u003C/li>\r\n\u003Cli>certificates and chains of certificates\u003C/li>\r\n\u003Cli>mutual authentication\u003C/li>\r\n\u003Cli>session key exchange\u003C/li>\r\n\u003Cli>Diffie-Hellman scheme background\u003C/li>\r\n\u003Cli>PSK (pre-shared key)\u003C/li>\r\n\u003Cli>secure session\u003C/li>\r\n\u003Cli>provisioning\u003C/li>\r\n\u003Cli>alias certificates (dynamic certificates)\u003C/li>\r\n\u003Cli>complications of having 2 certificate models\u003C/li>\r\n\u003Cli>open source libspdw, a sample implementation\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>IDE_KM (IDE Key Management)\r\n\u003Cul>\r\n\u003Cli>Key management messages over SPDM\u003C/li>\r\n\u003Cli>Root port handling\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>DOE (Data Object Exchange)\r\n\u003Cul>\r\n\u003Cli>Mailboxes and their use\u003C/li>\r\n\u003Cli>DOE Extended Capability structure\u003C/li>\r\n\u003Cli>DOE Capabilities registers\u003C/li>\r\n\u003Cli>DOE Interrupts\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>MCTP (Management Component Transport Protocol)\r\n\u003Cul>\r\n\u003Cli>manageability traffic and the pre-boot environment\u003C/li>\r\n\u003Cli>transport bindings\u003C/li>\r\n\u003Cli>messages\u003C/li>\r\n\u003Cli>packets\u003C/li>\r\n\u003Cli>endpoints and EIDs (endpoint IDs)\u003C/li>\r\n\u003Cli>the MCTM Bus Manager\u003C/li>\r\n\u003Cli>SPDM over MCTP Binding\u003C/li>\r\n\u003Cli>Secured MCTP Messages over MCTP Binding\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>MCTP over SMBus and I2C\u003C/li>\r\n\u003Cli>MCTP over PCIe, and PCIe VDMs\u003C/li>\r\n\u003Cli>TDISP (TEE Device Interface Security Protocol)\u003C/li>\r\n\u003Cli>Summary, putting it all together\u003C/li>\r\n\u003C/ul>","2025-01-29T17:29:58.000000Z","2025-08-07T14:53:28.000000Z","3 days","public/live_training_courses/thumbnails/live_training_course_744_thumbnail_1747666656.png","pcie-security","PCIe Security Training","pcie security training, tutorial","MindShare PCIe Security Training","\u003Cul>\r\n\u003Cli>PDF of course slides\u003C/li>\r\n\u003Cli>Optional add-on: \u003Ca href=\"../elearning-course/pcie-security-elearning-course\">PCIe Security eLearning course\u003C/a> (discounted pricing applies)\u003C/li>\r\n\u003C/ul>",{"id":18,"title":28,"created_at":29,"updated_at":30,"order":19},[192],{"id":136,"name":137,"about":138,"instructor_fullname":139,"instructor_email":140,"price":83,"price_arbor":83,"created_at":39,"updated_at":141,"you_will_learn":142,"equivelent_of":86,"subscription_length":43,"video_id":143,"is_active":12,"prerequisites":144,"modified_at":145,"order":146,"presentation_id":147,"slug":148,"course_category_id":50,"release_date":51,"old_product_id":149,"meta_description":150,"meta_keywords":151,"author_signature":152,"description":153,"meta_title":150,"whats_included":154,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":193},{"live_training_course_id":174,"elearning_course_id":136},{"id":195,"name":196,"description":197,"about":198,"you_will_learn":199,"prerequisites":200,"is_active":12,"modified_at":13,"course_outline":201,"created_at":202,"updated_at":203,"duration":204,"category_id":18,"order":146,"thumbnail":205,"slug":206,"old_live_courses_id":207,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":208,"meta_keywords":209,"meta_description":210,"training_materials":211,"category":212,"elearning_courses":213},723,"CXL - Compute Express Link","\u003Cp>Compute Express Link (CXL) is a high-bandwidth, low-latency serial bus interconnect between host processors and devices such as accelerators, memory controllers/buffers, and I/O devices. CXL 3.0 is based on PCI Express (PCIe) 6.0 physical layer running at 64 GT/s with x16, x8 and x4 link widths. Degraded modes run at 32 GT/s, 16 GT/s and 8 GT/s with x2 and x1 link widths.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>CXL interconnect adds coherency and memory semantics, thus allowing for its application in heterogeneous processing systems with a variety of host processors, memory subsystems and peripheral devices interconnected. CXL has applications in standard computer systems, Artificial Intelligence (AI), Machine Learning, communication systems, and High-Performance Computing (HPC). Emerging applications require a diverse mix of CPUs, GPUs, FPGAs, peripherals such as smart NICs, and other accelerators interconnected via an open industry standard protocol with the necessary features which CXL provides. CXL provides a rich set of three protocols that include 1) CXL.io based on PCIe TLP based transactions, 2) CXL.cache and 3) CXL.mem semantics. CXL uses the PCIe stack offering full interoperability with PCIe. CXL.cachemem protocols allow for coherent transactions in memory space. These transactions employ Flit-based packet routing on the Link.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>MindShare’s comprehensive CXL 3.0 Architecture course provides a solid foundation of platform architectures and use cases of the three CXL protocols with Type 1, Type 2 and Type 3 devices in platform example. The course details the role of the Transaction Layer protocol, Link Layer including Flit packing and unpacking, ARB/MUX and Flex Bus Logical and Electrical Physical Layer of a CXL port design. We explain enumeration and configuration process during system bring-up with details of configuration and component registers. Other topics include switch architecture, reset, manageability, RAS features, power management, performance considerations and compliance testing. The course describes new features added to the CXL 3.0 spec such as 256B and Port Based Routing (PBR) Flits, CXL.mem Back-Invalidation, Dynamic Capacity Devices (DCD), LD-FAM and G-FAM Devices, Global Integrated Memory (GIM), Multi-Headed (MH) Devices, Hierarchy Based Routing (HBR) and Port Based Routing (PBR), Direct Peer-to-Peer Routing and lots more.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"CXL\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>CXL system architectures with Type 1, Type 2 and Type 3 device\u003C/li>\r\n\u003Cli>CXL transaction protocol for CXL.io and CXL.cachemem including support for back-invalidation to CXL.cache protocol and device scaling\u003C/li>\r\n\u003Cli>CXL port design layers such as Transaction, Link, ARB/MUX and Flex Bus Physical Layers\u003C/li>\r\n\u003Cli>CXL switch architecture including new features to CXL 3.0 HBR/PBR Switches (optional topic)\u003C/li>\r\n\u003Cli>Enumeration and initialization issues with Configuration and Component register definitions\u003C/li>\r\n\u003Cli>Power management\u003C/li>\r\n\u003Cli>Reliability, Availability, Serviceability (RAS) and error handling features\u003C/li>\r\n\u003Cli>Considerations to improve protocol performance\u003C/li>\r\n\u003Cli>CXL 3.0 Spec added features such as 256B Flit support, G-FAM/LD-FAM Devices, Dynamic Capacity Devices (DCD), CXL Fabrics etc.\u003C/li>\r\n\u003C/ul>","\u003Cp>Good working knowledge of PCI Express is a must. Computer architecture fundamentals. Knowledge of Intel, AMD or Arm processor architectures. Knowledge of cache coherency and MESI protocol is recommended.\u003C/p>","\u003Cp class=\"sectionsubhead\"> \u003C/p>\r\n\u003Ctable>\r\n\u003Ctbody>\r\n\u003Ctr>\r\n\u003Ctd style=\"padding-left: 20pt; font-family: Arial,Verdana,sans-serif; font-size: 12px;\">\r\n\u003Ctable style=\"color: rgb(0, 0, 0); font-variant-caps: normal; border-collapse: collapse; width: 665pt;\" border=\"0\" width=\"888\" cellspacing=\"0\" cellpadding=\"0\">\u003Ccolgroup>\u003Ccol style=\"width: 323pt;\" width=\"431\">\u003Ccol style=\"width: 75pt;\" width=\"100\">\u003Ccol style=\"width: 71pt;\" span=\"2\" width=\"95\">\u003Ccol style=\"width: 60pt;\" width=\"80\">\u003Ccol style=\"width: 65pt;\" width=\"87\">\u003C/colgroup>\r\n\u003Ctbody>\r\n\u003Ctr style=\"height: 12pt;\">\r\n\u003Ctd class=\"xl67\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: 0.5pt 0.5pt medium; border-style: solid solid none; border-color: windowtext windowtext currentcolor; border-image-source: none; text-align: center; height: 12pt; width: 323pt;\" width=\"431\" height=\"16\"> \u003C/td>\r\n\u003Ctd class=\"xl81\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: 0.5pt 0.5pt 0.5pt medium; border-style: solid solid solid none; border-color: windowtext windowtext windowtext currentcolor; border-image-source: none; text-align: center; width: 75pt; background-color: rgb(226, 239, 217);\" width=\"100\">5-Day Class\u003C/td>\r\n\u003Ctd class=\"xl81\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: 0.5pt 0.5pt 0.5pt medium; border-style: solid solid solid none; border-color: windowtext windowtext windowtext currentcolor; border-image-source: none; text-align: center; width: 71pt; background-color: rgb(189, 220, 162);\" width=\"95\">5-Day Class\u003C/td>\r\n\u003Ctd class=\"xl81\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: 0.5pt 0.5pt 0.5pt medium; border-style: solid solid solid none; border-color: windowtext windowtext windowtext currentcolor; border-image-source: none; text-align: center; width: 71pt; background-color: rgb(226, 239, 217);\" width=\"95\">2-Day Class\u003C/td>\r\n\u003Ctd class=\"xl81\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: 0.5pt 0.5pt 0.5pt medium; border-style: solid solid solid none; border-color: windowtext windowtext windowtext currentcolor; border-image-source: none; text-align: center; width: 60pt; background-color: rgb(226, 239, 217);\" width=\"80\">5-Day Class\u003C/td>\r\n\u003Ctd class=\"xl81\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: 0.5pt 0.5pt 0.5pt medium; border-style: solid solid solid none; border-color: windowtext windowtext windowtext currentcolor; border-image-source: none; text-align: center; width: 65pt; background-color: rgb(226, 239, 217);\" width=\"87\">4-Day Class\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 24pt;\">\r\n\u003Ctd class=\"xl68\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: middle; border-width: medium 0.5pt 0.5pt; border-style: none solid solid; border-color: currentcolor windowtext windowtext; border-image-source: none; text-align: center; height: 24pt; width: 323pt;\" width=\"431\" height=\"32\">Topics\u003C/td>\r\n\u003Ctd class=\"xl69\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt 0.5pt medium; border-style: none solid solid none; border-color: currentcolor windowtext windowtext currentcolor; border-image-source: none; text-align: center; width: 75pt; background-color: rgb(226, 239, 217);\" width=\"100\">CXL 3.1 w/ Switches\u003C/td>\r\n\u003Ctd class=\"xl69\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt 0.5pt medium; border-style: none solid solid none; border-color: currentcolor windowtext windowtext currentcolor; border-image-source: none; text-align: center; width: 71pt; background-color: rgb(189, 220, 162);\" width=\"95\">CXL 3.1 w/o Switches\u003C/td>\r\n\u003Ctd class=\"xl68\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: middle; border-width: medium 0.5pt 0.5pt medium; border-style: none solid solid none; border-color: currentcolor windowtext windowtext currentcolor; border-image-source: none; text-align: center; width: 71pt; background-color: rgb(226, 239, 217);\" width=\"95\">CXL 3.1 Update\u003C/td>\r\n\u003Ctd class=\"xl69\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt 0.5pt medium; border-style: none solid solid none; border-color: currentcolor windowtext windowtext currentcolor; border-image-source: none; text-align: center; width: 60pt; background-color: rgb(226, 239, 217);\" width=\"80\">CXL 2.0 w/ Switches\u003C/td>\r\n\u003Ctd class=\"xl69\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt 0.5pt medium; border-style: none solid solid none; border-color: currentcolor windowtext windowtext currentcolor; border-image-source: none; text-align: center; width: 65pt; background-color: rgb(226, 239, 217);\" width=\"87\">CXL 2.0 w/o Switches\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 16pt;\">\r\n\u003Ctd class=\"xl79\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: middle; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; height: 16pt; width: 323pt;\" width=\"431\" height=\"21\">CXL Features and Architecture Overview\u003C/td>\r\n\u003Ctd class=\"xl79\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: middle; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; width: 75pt; background-color: rgb(226, 239, 217);\" width=\"100\"> \u003C/td>\r\n\u003Ctd class=\"xl70\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl70\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl70\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl70\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 12pt;\">\r\n\u003Ctd class=\"xl71\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: middle; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; height: 12pt; width: 323pt;\" width=\"431\" height=\"16\">CXL 1.1, CXL 2.0 and CXL 3.x Features\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 12pt;\">\r\n\u003Ctd class=\"xl71\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: middle; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; height: 12pt; width: 323pt;\" width=\"431\" height=\"16\">CXL.mem, CXL.cache and CXL.io\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 12pt;\">\r\n\u003Ctd class=\"xl71\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: middle; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; height: 12pt; width: 323pt;\" width=\"431\" height=\"16\">Type 1 (with cache), Type 2 (with cache and memory, Type 3 (with memory) Devices\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 12pt;\">\r\n\u003Ctd class=\"xl71\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: middle; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; height: 12pt; width: 323pt;\" width=\"431\" height=\"16\">Switch and MLD device architecture overview\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 12pt;\">\r\n\u003Ctd class=\"xl71\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: middle; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; height: 12pt; width: 323pt;\" width=\"431\" height=\"16\">CXL 3.x features overview\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 12pt;\">\r\n\u003Ctd class=\"xl71\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: middle; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; height: 12pt; width: 323pt;\" width=\"431\" height=\"16\">Layered architecture overview\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 12pt;\">\r\n\u003Ctd class=\"xl71\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: middle; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; height: 12pt; width: 323pt;\" width=\"431\" height=\"16\">Transaction flows in platforms with PCIe, CXL Type 1, 2, 3 Devices\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">Update\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 12pt;\">\r\n\u003Ctd class=\"xl71\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: middle; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; height: 12pt; width: 323pt;\" width=\"431\" height=\"16\">Cache coherency and MESI protocol tutorial\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl73\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: middle; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Transaction Layer\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">CXL.mem protocol\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">Update\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">CXL.cache protocol \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">Update\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Back-invalidation and CXL.cache device scaling\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">CXL.io protocol\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">Update\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">PTH and UIO\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Ordering Rules\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl75\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Link Layer\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">IO Flit Packing\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Cache/Mem Flit Packing\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Control Flits\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">68B Flits\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">256B and PBR Flits\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Cachemem Link Layer Retry (LLR) mechanism\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Flow Control\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Viral Feature\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl75\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">ARB/MuX Layer\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Arbitration and Flit Multiplexing/DeMuxing \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">vLSM and Link Power Management \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">ALMP Flits\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl75\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Physical Layer\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Protocol ID \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Flit Header\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">NOP Flits, IDLE Flits, Latency Optimized Flits\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">CRC, FEC\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Synch Header Bypass\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">1b/1b encoding\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Link Training\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl75\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Reset\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Cold reset\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Warm reset\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Hot reset\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">CXL reset\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Function Level reset\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl75\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Power Management\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Runtime control PM\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Physical Layer PM\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">CXL.io PM\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">CXL.cachemem PM\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl75\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">RAS and Error Handling\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">EFN Message\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Viral Handling\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Error Logging\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl75\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Enumeration and Manageability\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Enumeration in 1.1 and 2.0 Platforms\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Memory Interleaving \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Memory Interleaving in CXL 3.x\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl75\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Control and Status Registers\u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Configuration registers and DVSEC\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Component Registers\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Backwards compatibiity to CXL 1.1\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">CXL 3.x registers\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl75\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">CXL 2.0 Switches\u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Architectural overview with configuration options\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Various switch types\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Transaction forwarding\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Virtual Hierachy\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Fabric Manager and commands\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl80\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">CXL 3.x Switches\u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Hierarchy Based Routing (HBR)\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Port Based Rounting (PBR)\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">CXL Fabrics\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">G-FAM Access Endpoint (GAE)\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">FAST, LDST and ID-based Rerouting\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl75\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">CXL 3.x Device Types\u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\"> \u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl76\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-weight: bold; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">LD-FAM, G-FAM (GFD)\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Multi-Headed SLD, MLD and GFD Devices\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Dynamic Capacity Device (DCD)\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl74\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt; border-style: none solid; border-color: currentcolor windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Global Integrated Memory (GIM)\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl72\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt medium medium; border-style: none solid none none; border-color: currentcolor windowtext currentcolor currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003Ctr style=\"height: 11pt;\">\r\n\u003Ctd class=\"xl77\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 9px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt 0.5pt; border-style: none solid solid; border-color: currentcolor windowtext windowtext; border-image-source: none; white-space: nowrap; height: 11pt;\" height=\"15\">Shared Memory verses Pooled Memory\u003C/td>\r\n\u003Ctd class=\"xl78\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt 0.5pt medium; border-style: none solid solid none; border-color: currentcolor windowtext windowtext currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl78\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt 0.5pt medium; border-style: none solid solid none; border-color: currentcolor windowtext windowtext currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(189, 220, 162);\">X\u003C/td>\r\n\u003Ctd class=\"xl78\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt 0.5pt medium; border-style: none solid solid none; border-color: currentcolor windowtext windowtext currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\">X\u003C/td>\r\n\u003Ctd class=\"xl78\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt 0.5pt medium; border-style: none solid solid none; border-color: currentcolor windowtext windowtext currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003Ctd class=\"xl78\" style=\"padding-top: 1px; padding-right: 1px; padding-left: 1px; font-size: 8pt; font-family: Arial, sans-serif; vertical-align: bottom; border-width: medium 0.5pt 0.5pt medium; border-style: none solid solid none; border-color: currentcolor windowtext windowtext currentcolor; border-image-source: none; white-space: nowrap; text-align: center; background-color: rgb(226, 239, 217);\"> \u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>\r\n\u003Cp> \u003C/p>","2023-08-03T18:45:04.000000Z","2025-08-07T14:50:35.000000Z","2 - 5 days","public/live_training_courses/thumbnails/live_training_course_723_thumbnail_1747666716.png","cxl-compute-express-link",90,"CXL Training","cxl training, compute express link, tutorial","MindShare CXL Training course","\u003Cul>\r\n\u003Cli>PDF of course slides\u003C/li>\r\n\u003Cli>\"\u003Ca href=\"../../ebook/pci-express-technology-30\">PCI Express Technology\u003C/a>\" eBook (covers PCIe 3.0)\u003C/li>\r\n\u003Cli>Optional add-on: \u003Ca href=\"../../elearning-course/comprehensive-cxl-20-elearning-course\">CXL 2.0 eLearning Course\u003C/a> (discounted pricing applies)\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv>Optional add-on: \u003Ca href=\"../../elearning-course/cxl-31-update-elearning-course\">CXL 3.0 Update eLearning Course\u003C/a> (discounted pricing applies)\u003C/div>\r\n\u003C/li>\r\n\u003C/ul>",{"id":18,"title":28,"created_at":29,"updated_at":30,"order":19},[214,233,251],{"id":215,"name":216,"about":217,"instructor_fullname":218,"instructor_email":219,"price":220,"price_arbor":220,"created_at":39,"updated_at":221,"you_will_learn":222,"equivelent_of":42,"subscription_length":43,"video_id":223,"is_active":12,"prerequisites":164,"modified_at":224,"order":146,"presentation_id":225,"slug":226,"course_category_id":146,"release_date":51,"old_product_id":227,"meta_description":216,"meta_keywords":228,"author_signature":229,"description":230,"meta_title":216,"whats_included":231,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":232},1756,"CXL Fundamentals eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"CXL\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","Ravi Budruk","ravi@mindshare.com","595","2025-10-31T13:15:28.000000Z","\u003Cdiv>\r\n\u003Cul>\r\n\u003Cli>CXL system architectures with Type 1, Type 2 and Type 3 devices\u003C/li>\r\n\u003Cli>CXL Port Layers with an overview of each\u003C/li>\r\n\u003Cli>Intro to DVSEC and Component Register Space for CXL\u003C/li>\r\n\u003C/ul>\r\n\u003C/div>",37762,"2025-07-24 18:56:26",503,"cxl-fundamentals-elearning-course",824,"cxl, compute express link, elearning, training","Ravi-Budruk","\u003Cp>MindShare’s CXL Fundamentals course provides a solid foundation of platform architectures and use cases of the three CXL protocols with Type 1, Type 2 and Type 3 devices. Engineering managers will learn about features and capability of each of the three device types allowing decision making about which type of device to implement.    \u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/cxlfund_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/cxlfund_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>CXL Fundamentals eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":195,"elearning_course_id":215},{"id":234,"name":235,"about":236,"instructor_fullname":218,"instructor_email":219,"price":83,"price_arbor":83,"created_at":39,"updated_at":237,"you_will_learn":238,"equivelent_of":86,"subscription_length":43,"video_id":239,"is_active":12,"prerequisites":240,"modified_at":241,"order":19,"presentation_id":242,"slug":243,"course_category_id":146,"release_date":51,"old_product_id":244,"meta_description":245,"meta_keywords":246,"author_signature":229,"description":247,"meta_title":248,"whats_included":249,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":250},1763,"CXL 3.1 Update eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"CXL 3.1\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","2025-10-31T13:16:58.000000Z","\u003Cdiv>\r\n\u003Cul>\r\n\u003Cli>256 Byte Flit Mode\u003C/li>\r\n\u003Cli>Port-Based Routing\u003C/li>\r\n\u003Cli>Cache.mem Back-Invalidations\u003C/li>\r\n\u003Cli>CXL Fabric extensions\u003C/li>\r\n\u003Cli>and much more...\u003C/li>\r\n\u003C/ul>\r\n\u003C/div>",37769,"\u003Cp>CXL 2.0 knowledge is required.\u003C/p>","2025-07-15 19:02:55",521,"cxl-31-update-elearning-course",861,"CXL 3.1 Update eLearning, compute express link","cxl 3.1, tutorial, training, online","\u003Cp>This course is meant to go through all the new and updated topics introduced in the CXL 3.0 and 3.1 specs. This course does expect the learner to already have a solid understanding of CXL 2.0.\u003C/p>","CXL 3.1 Update eLearning","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cem>\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/cxl3_update_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/em>\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/cxl3_update_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>CXL 3.1 Update eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":195,"elearning_course_id":234},{"id":252,"name":253,"about":254,"instructor_fullname":218,"instructor_email":219,"price":160,"price_arbor":160,"created_at":39,"updated_at":255,"you_will_learn":256,"equivelent_of":47,"subscription_length":43,"video_id":257,"is_active":12,"prerequisites":258,"modified_at":259,"order":42,"presentation_id":260,"slug":261,"course_category_id":146,"release_date":51,"old_product_id":262,"meta_description":263,"meta_keywords":228,"author_signature":229,"description":264,"meta_title":265,"whats_included":266,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":267},1758,"CXL 2.0 eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"CXL 2.0\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","2025-10-31T13:15:59.000000Z","\u003Cdiv>\r\n\u003Cul>\r\n\u003Cli>CXL system architectures with Type 1, Type 2 and Type 3 devices\u003C/li>\r\n\u003Cli>CXL transaction protocol for CXL.io and CXL.cache/mem\u003C/li>\r\n\u003Cli>CXL port design constituting Transaction, Link, ARB/MUX and Flex Bus Physical Layers\u003C/li>\r\n\u003Cli>CXL switch architecture (optional)\u003C/li>\r\n\u003Cli>Enumeration and initialization issues with configuration register definitions\u003C/li>\r\n\u003Cli>Power management\u003C/li>\r\n\u003Cli>Reliability, Availability, Serviceability (RAS) and error handling features\u003C/li>\r\n\u003Cli>Considerations to improve protocol performance\u003C/li>\r\n\u003C/ul>\r\n\u003C/div>",37764,"\u003Cp>PCIe 5.0 knowledge is recommended.\u003C/p>","2025-01-01 23:28:14",505,"comprehensive-cxl-20-elearning-course",831,"Comprehensive CXL 2.0 eLearning","\u003Cp>MindShare’s comprehensive CXL 2.0 Architecture course provides a solid foundation of platform architectures and use cases of the three CXL protocols with Type 1, Type 2 and Type 3 devices in platform example. The course details the role of the Transaction Layer protocol, Link Layer including Flit packing and unpacking, ARB/MUX and Flex Bus Logical and Electrical Physical Layer of a CXL port design. We explain enumeration and configuration process during system bring-up with details of configuration and component registers. Other topics include switch architecture, reset, manageability, RAS features, power management, performance considerations and compliance testing.\u003C/p>","CXL 2.0 eLearning","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/cxlcomp_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/cxlcomp_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>CXL Architecture eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":195,"elearning_course_id":252},{"id":269,"name":270,"description":271,"about":272,"you_will_learn":273,"prerequisites":274,"is_active":12,"modified_at":13,"course_outline":275,"created_at":276,"updated_at":277,"duration":183,"category_id":18,"order":86,"thumbnail":278,"slug":279,"old_live_courses_id":13,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":280,"category":281,"elearning_courses":282},745,"CXL Security","\u003Cp>The need for security in computer systems has increased dramatically over the years. There are many factors behind this, including:\u003C/p>\r\n\u003Cul>\r\n\u003Cli>Downloadable firmware that is used to implement devices (known as soft devices) that used to be hard-coded.\u003C/li>\r\n\u003Cli>Counterfeit devices in the supply chain.\u003C/li>\r\n\u003Cli>Malicious actors building back doors into genuine devices.\u003C/li>\r\n\u003Cli>Virtualization, where we have multiple operating systems sharing the same platform.\u003C/li>\r\n\u003Cli>Greatly increasing complexity opening the door to design errors and implementation bugs.\u003C/li>\r\n\u003Cli>Sophisticated attackers with resources to search for the smallest hole.\u003C/li>\r\n\u003Cli>Increased rewards for a successful system attack, whether monetary (perhaps from the theft of crypto), or from destructive intent to a target (such as a power grid).\u003C/li>\r\n\u003Cli>Increasing connectivity of systems, such that a platform that was isolated and therefore secure, is now online and attackable from the other side of the world.\u003C/li>\r\n\u003Cli>Device portability, such that physical access to a system in a secure data center is not required, the target is a laptop or phone class of system.\u003C/li>\r\n\u003Cli>Growth of sensitive data on devices, such that the system attacker might be a “good guy” such as law enforcement trying to prevent a terrorist attack.\u003C/li>\r\n\u003Cli>An increasing complex world where the definition of “good guy” and “bad guy” are not clear.\u003C/li>\r\n\u003C/ul>\r\n\u003Cp>CXL, as an interconnect that carries memory and cache traffic, offers a high value target. Consider a system where memory encryption is implemented by the memory controller. In such a system, it may be easier to attack traffic on the interconnect before it reaches the memory controller and is encrypted.\u003C/p>\r\n\u003Cp>CXL 2.0 adds security capabilities, based on the PCIe and DMTF features. This CXL focused security course covers these security topics looking at how such high value traffic is protected.\u003C/p>\r\n\u003Cp>This course covers CXL 2.0, CXL 3.0 and CXL 3.1.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"CXL Security\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>Threat models.\u003C/li>\r\n\u003Cli>STRIDE categories (spoofing, tampering, repudiation, information disclosure, repudiation, denial of service, elevation of privilege).\u003C/li>\r\n\u003Cli>CXL overview, highlighting the areas we will discuss with respect to attacks.\u003C/li>\r\n\u003Cli>Differences between CXL.io and CXL.mem / CXL.cache in terms of addressing and IOMMU, and the effects on security.\u003C/li>\r\n\u003Cli>Using the IOMMU to prevent DMA attacks, and the potential security holes with an IOMMU.\u003C/li>\r\n\u003Cli>Other DMA attack mitigations such as encrypted memory and enclaves.\u003C/li>\r\n\u003Cli>Interrupt attacks.\u003C/li>\r\n\u003Cli>Using Interrupt Remapping to prevent interrupt attacks, and the security holes with interrupt remapping.\u003C/li>\r\n\u003Cli>The idea of mutable versus immutable, and why everything needs to be treated as mutable.\u003C/li>\r\n\u003Cli>Error reporting attacks.\u003C/li>\r\n\u003Cli>Switch based attacks.\u003C/li>\r\n\u003Cli>Using the IOMMU to prevent DMA attacks, and the potential security holes with an IOMMU.\u003C/li>\r\n\u003Cli>The enhancements to the CXL fabric and to manageability (IDE – Integrity and Data Encryption plus SPDM, MCTP and CMA).\u003C/li>\r\n\u003Cli>The boundaries of the protection from the enhancements, and possible paths to attacking such a secured system.\u003C/li>\r\n\u003Cli>TSP (TEE (Trusted Execution Environment) Security Protocol)\u003C/li>\r\n\u003C/ul>","\u003Cp>The MindShare CXL 2.0 class or equivalent knowledge is recommended as a pre-requisite.\u003Cbr>Basic knowledge of processor (Intel/AMD/ARM) and computer architecture.\u003C/p>","\u003Cul>\r\n\u003Cli>Fabric based attacks (watching links, changing packets, injecting packets).\u003C/li>\r\n\u003Cli>Malicious hardware, counterfeit hardware.\u003C/li>\r\n\u003Cli>Impersonation (where a device pretends to be something else).\u003C/li>\r\n\u003Cli>The need for\r\n\u003Cul>\r\n\u003Cli>Establishing trust (host knowing the device, device knowing the host).\u003C/li>\r\n\u003Cli>Key exchange.\u003C/li>\r\n\u003Cli>Encrypted links.\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Keys, certificates and encryption background\r\n\u003Cul>\r\n\u003Cli>symmetric encryption\u003C/li>\r\n\u003Cli>public and private keys\u003C/li>\r\n\u003Cli>TLS (Transport Layer Security) background\u003C/li>\r\n\u003Cli>encryption standards\u003C/li>\r\n\u003Cli>certificates\u003C/li>\r\n\u003Cli>X.509 trust model\u003C/li>\r\n\u003Cli>AES-GCM\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>TCG (Trusted Computing Group) background\r\n\u003Cul>\r\n\u003Cli>root of trust\u003C/li>\r\n\u003Cli>attestation\u003C/li>\r\n\u003Cli>system startup\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>CXL.io protection\r\n\u003Cul>\r\n\u003Cli>uses PCIe IDE\u003C/li>\r\n\u003Cli>link security threat model\u003C/li>\r\n\u003Cli>exposures not covered by the threat model\u003C/li>\r\n\u003Cli>stream establishment\u003C/li>\r\n\u003Cli>side channel attacks via unencrypted headers\u003C/li>\r\n\u003Cli>TLPs\u003C/li>\r\n\u003Cli>TLP Encryption\u003C/li>\r\n\u003Cli>TLP Aggregation\u003C/li>\r\n\u003Cli>IDE Extended Capability structure\u003C/li>\r\n\u003Cli>IDE Sub-Streams\u003C/li>\r\n\u003Cli>IDE_KM (Key Management)\u003C/li>\r\n\u003Cli>power management and resets\u003C/li>\r\n\u003Cli>error conditions and error reporting\u003C/li>\r\n\u003Cli>IDE may not be sufficient, what else may be needed\r\n\u003Cul>\r\n\u003Cli>key exchange\u003C/li>\r\n\u003Cli>trust\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>CXL. memory and CXL.cache protection\r\n\u003Cul>\r\n\u003Cli>similar to PCIe IDE, but FLIT based\u003C/li>\r\n\u003Cli>link IDE only, the role of the switch\u003C/li>\r\n\u003Cli>FLITs\u003C/li>\r\n\u003Cli>FLIT Encryption\u003C/li>\r\n\u003Cli>FLIT Aggregation\u003C/li>\r\n\u003Cli>IDE control FLIT\u003C/li>\r\n\u003Cli>MAC handling, truncated MACs, MAC transmission\u003C/li>\r\n\u003Cli>containment mode and skid mode\u003C/li>\r\n\u003Cli>PCRC for crypto engine robustness\u003C/li>\r\n\u003Cli>CXL_IDE_KM, key management for CXL.cachemem\u003C/li>\r\n\u003Cli>Changes for the 256 byte flit\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>DMTF Specifications overview\u003C/li>\r\n\u003Cli>Security Protocol and Data Model (SPDM)\r\n\u003Cul>\r\n\u003Cli>multiple paths to devices (SMbus, I2C)\u003C/li>\r\n\u003Cli>threat model\u003C/li>\r\n\u003Cli>mutable and immutable objects\u003C/li>\r\n\u003Cli>authentication\u003C/li>\r\n\u003Cli>attestation\u003C/li>\r\n\u003Cli>recommended flow\u003C/li>\r\n\u003Cli>handling versions\u003C/li>\r\n\u003Cli>certificates and chains of certificates\u003C/li>\r\n\u003Cli>mutual authentication\u003C/li>\r\n\u003Cli>session key exchange\u003C/li>\r\n\u003Cli>Diffie-Hellman scheme background\u003C/li>\r\n\u003Cli>PSK (pre-shared key)\u003C/li>\r\n\u003Cli>secure session\u003C/li>\r\n\u003Cli>provisioning\u003C/li>\r\n\u003Cli>alias certificates (dynamic certificates)\u003C/li>\r\n\u003Cli>complications of having 2 certificate models\u003C/li>\r\n\u003Cli>open source libspdw, a sample implementation\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>CMA (Component Measurement and Authentication)\u003C/li>\r\n\u003Cli>MCTP (management Component Transport Protocol)\u003C/li>\r\n\u003Cli>DOE (Data Object Exchange)\r\n\u003Cul>\r\n\u003Cli>Mailboxes and their use\u003C/li>\r\n\u003Cli>DOE Extended Capability structure\u003C/li>\r\n\u003Cli>DOE Capabilities registers\u003C/li>\r\n\u003Cli>DOE Interrupts\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>TSP (TEE Security Protocol)\r\n\u003Cul>\r\n\u003Cli>PCIe TDISP background\u003C/li>\r\n\u003Cli>CXL implementation of TSP\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Memory Encryption\u003C/li>\r\n\u003C/ul>\r\n\u003Cp>Optional content covered in a 3-day class and covered on 1st day\u003C/p>\r\n\u003Cul>\r\n\u003Cli>DMA attacks, copying or modifying memory.\u003C/li>\r\n\u003Cli>Use of an IOMMU to prevent DMA attacks.\u003C/li>\r\n\u003Cli>IOMMU issues at boot time versus runtime, setup and configuration of the IOMMU, and the ACPI DMAR tables.\u003C/li>\r\n\u003Cli>Error reporting from devices.\u003C/li>\r\n\u003Cli>Congestion based attacks.\u003C/li>\r\n\u003Cli>Interrupt based attacks, with the interrupt remapping as mitigation.\u003C/li>\r\n\u003C/ul>","2025-01-29T20:20:04.000000Z","2025-06-03T16:04:52.000000Z","public/live_training_courses/thumbnails/live_training_course_745_thumbnail_1747666738.png","cxl-security","\u003Cul>\r\n\u003Cli>PDF of course slides\u003C/li>\r\n\u003C/ul>",{"id":18,"title":28,"created_at":29,"updated_at":30,"order":19},[],{"id":284,"name":285,"description":286,"about":287,"you_will_learn":288,"prerequisites":289,"is_active":12,"modified_at":13,"course_outline":290,"created_at":291,"updated_at":292,"duration":183,"category_id":18,"order":89,"thumbnail":293,"slug":294,"old_live_courses_id":13,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":295,"meta_keywords":296,"meta_description":297,"training_materials":298,"category":299,"elearning_courses":300},747,"UALink - Ultra Accelerator Link","\u003Cp>The UALink specification outlines a set of protocols and interfaces designed to form systems using multiple System Nodes aimed at AI applications. Each System Node normally includes one or more Host CPUs and Accelerators connected by various interconnects such as CXL, PCIe, AMD Infinity Fabric, etc. These nodes typically allow coherent access across Host and Accelerator memory within the node. Each node operates under a single OS image. UALink supports low-latency communication between Accelerators across System Nodes, allowing direct read, write, and atomic transactions. This inter-node communication is restricted to Accelerator initiated traffic. UALink protocol does not permit Host CPU access to memory across different System Nodes.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>The UALink specification defines the UALink interface between different physical devices connected by a Link. The specification not only includes the traditional description of a serial bus stack (Transaction, Data Link and Physical Layer), but also includes a description of a UALink Protocol Level Interface (UPLI) also referred to as the Protocol Layer. The UPLI facilitates the standardization of an interface between a component and the UALink stack whether the component be an Accelerator core or a Switch core.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>The UALink physical interface is a high bandwidth 200GT/s per Lane, maximum 4 Lanes, point-to-point serial interface Link between Accelerators and Switches, promoting a switching ecosystem for Accelerators. The UALink allows for up to 1024 Accelerators or endpoints in a network to communicate using a 10-bit Identifier.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>MindShare’s comprehensive UALink 1.0 Architecture course provides a solid foundation of platform architectures and use cases of the UALink protocol. The course details the role of each of the layers in the stack. These include the Protocol Layer, Transaction Layer, Data Link Layer and Ethernet PHY Layer. We explain UALink Address Translation Model, Remote Memory Access (RMA) and UALink IO Coherency Model, UPLI operating rules, RAS, manageability and UALink Switch architecture, including configuration.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"UALink\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>UALink spec terminology\u003C/li>\r\n\u003Cli>Function of each layer that makes up the UALink port stack\u003C/li>\r\n\u003Cli>UPLI interface definitions and operating rules along with interface signals\u003C/li>\r\n\u003Cli>Tx and Rx compression caches\u003C/li>\r\n\u003Cli>TL Flit and Half Flit formats as well as DL Flit format\u003C/li>\r\n\u003Cli>DL message format\u003C/li>\r\n\u003Cli>TL Flow Control and DL Replay support\u003C/li>\r\n\u003Cli>Physical Layer encode/decode and FEC plus transmit and receive functions\u003C/li>\r\n\u003Cli>UALink RAS support\u003C/li>\r\n\u003Cli>Reset, signaling and connection\u003C/li>\r\n\u003Cli>Manageability requirements\u003C/li>\r\n\u003Cli>UALink Switch architecture and routing schemes\u003C/li>\r\n\u003C/ul>","\u003Cp>Computer architecture fundamentals. Suggested knowledge of high-speed serial bus architectures such as PCIe.\u003C/p>","\u003Ctable style=\"border-collapse: collapse; border-spacing: 0px; border: 1px solid rgb(0, 0, 0);\" cellspacing=\"0\" cellpadding=\"5\">\r\n\u003Ctbody>\r\n\u003Ctr>\r\n\u003Ctd valign=\"bottom\">\r\n\u003Cp align=\"center\">\u003Cstrong> \u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">\u003Cstrong>3-Day Class\u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">\u003Cstrong>1-Day Class\u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd>\r\n\u003Cp align=\"center\">\u003Cstrong>Topics\u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162); vertical-align: middle;\" valign=\"bottom\">\r\n\u003Cp align=\"center\">\u003Cstrong>UALink 1.0\u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">\u003Cstrong>UALink Fundamentals\u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\">\r\n\u003Cp>\u003Cstrong>UALink Features and Architecture Overview\u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\">\r\n\u003Cp>\u003Cstrong> \u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\">\r\n\u003Cp> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\">\r\n\u003Cp style=\"padding-left: 15px;\">Accelerator System Node and Multi-Node architecture\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\">\r\n\u003Cp style=\"padding-left: 15px;\">UPLI and Stack Layers overview\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\">\r\n\u003Cp style=\"padding-left: 15px;\">Address Translation Model\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\">\r\n\u003Cp style=\"padding-left: 15px;\">RAS overview\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\">\r\n\u003Cp style=\"padding-left: 15px;\">UALink Switch overview\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\">\r\n\u003Cp>\u003Cstrong>UPLI and Protocol Layer\u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\">\r\n\u003Cp> \u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\">\r\n\u003Cp> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">UPLI Interface and Interface Signals\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">Requests and Response paths\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">Time Division Multiplexing\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">UPLI Flow Control\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">UPLI Transactions\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">Ordering Rules for Read and Write Requests and Responses\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp>\u003Cstrong>Transaction Layer\u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">TL features\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">TL Flit and Half Flit formats, sequencing and packing\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">TL Write Flit Sequence Encoding\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">Tx and Rx Compression Caches\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">TL Flow Control and Backoff Modes\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp>\u003Cstrong>Data Link Layer\u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">DL features\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">DL Flit formats and packing\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">DL Messages\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> X \u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">Transmitter Pacing\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">Link Level Replay\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">DL States and Errors\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp>\u003Cstrong>Physical Layer\u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">PL features\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">Reconciliation Sublayers\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">PCS/PMA modifications\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">PCS and FEC\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">Low Latency FEC Interleave\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp>\u003Cstrong>UPLI Reset, Signaling and Connection\u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">UPLI Reset and Signaling\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X \u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">UPLI Control\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp>\u003Cstrong>RAS and Error Handling\u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">RAS requirements and End-to-End Data Protection\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">RAS error types\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">RAS error handling\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp>\u003Cstrong>Manageability\u003C/strong>\u003C/p>\r\n\u003Cp style=\"padding-left: 15px;\">For Accelerators and System Nodes\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">\u003Cstrong> \u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">For Switches and Switch Platforms\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">\u003Cstrong> \u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">For Pod Controllers and Virtual Pods\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">\u003Cstrong> \u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">Manageability Workflows\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">\u003Cstrong> \u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp>\u003Cstrong>UALink Switches\u003C/strong>\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">Bifurcation support\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">Lossless Request and Response delivery\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">Non-blocking architecture\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">Forward progress guarantee\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">Ordering Rules and Virtual Channels\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">Routing Table structure\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">Configuration\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp style=\"padding-left: 15px;\">Switch debug recommendations and Latency / Performance goals\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0); background-color: rgb(189, 220, 162);\" valign=\"bottom\">\r\n\u003Cp align=\"center\">X\u003C/p>\r\n\u003C/td>\r\n\u003Ctd style=\"border: 1px solid rgb(0, 0, 0);\" valign=\"bottom\">\r\n\u003Cp align=\"center\"> \u003C/p>\r\n\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>","2025-05-08T16:42:25.000000Z","2025-08-07T15:25:13.000000Z","public/live_training_courses/thumbnails/live_training_course_747_thumbnail_1747665786.jpg","ualink","UALink Accelerator Course","UALink Training, UALink Course, UALink 1.0 Training, Ultra Accelerator Link Training, UALink Training Course","UALink Training Course","\u003Cul>\r\n\u003Cli>PDF of course slides\u003C/li>\r\n\u003Cli>UALink eLearning course (when available)\u003C/li>\r\n\u003C/ul>",{"id":18,"title":28,"created_at":29,"updated_at":30,"order":19},[],{"id":302,"name":303,"description":304,"about":305,"you_will_learn":306,"prerequisites":307,"is_active":12,"modified_at":13,"course_outline":308,"created_at":309,"updated_at":310,"duration":311,"category_id":18,"order":47,"thumbnail":312,"slug":313,"old_live_courses_id":13,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":314,"category":315,"elearning_courses":316},740,"UCIe - Universal Chiplet Interconnect Express","\u003Cp>Universal Chiplet Interconnect Express (UCIe) is an open industry standard, multi-protocol, high-bandwidth (up to 32GT/s per lane), die-to-die (chiplet), interconnect that standardizes inter-die communication on-package. The UCIe 1.1 specification enables users to mix and match chiplet components from a multi-vendor ecosystem for System-on-Chip (SoC) build. The UCIe spec describes a standardized port and interconnect with physical layer, protocol stack and software model that enables inter-chiplet communication. UCIe supports multiple protocols such as PCIe, CXL, and a raw mode that can be used to map any protocol of choice (assuming both ends support it) on top of a common Physical and Link layer. The spec describes elements needed for SoC design such as the application layer, form-factors relevant to the package including bump location, power delivery and thermal solution.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>The initial protocols being mapped to UCIe are PCIe and CXL and are done using a Flit packet format for communication. Both PCIe and CXL protocol mappings will enable more on-package integration by replacing the PCIe SERDES PHY, the PCIe/CXL Logical Physical layer and the Link Level Retry (LLR) state-machines with a UCIe Adapter and PHY in order to improve the power and performance characteristics. UCIe also supports a protocol-agnostic raw mode to enable other protocols to be mapped.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>MindShare’s comprehensive UCIe Architecture course provides a solid foundation to understanding die-to-die architecture and use of UCIe retimers to extend connectivity beyond the package. The course describes port architecture details including protocol layer, die-to-die adapter layer, logical physical layer and electrical physical layer. We describe single and multi-module configurations. In addition, the course describes the sideband architecture details. Sideband interface is used for back-channel Link training, access to registers, Link management packets and parameter exchanges with remote Link partner. UCIe register architecture and the mechanism by which UCIe-aware SW discovers UCIe capability is described. An optional section describes a Raw Die-to-Die Interface (RDI) and Flit-aware Die-to-Die Interface (FDI) between the die-to-die adapter layer and physical layer.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"UCIe\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>UCIe system architecture used for die-to-die communication including use of UCIe retimers\u003C/li>\r\n\u003Cli>UCIe for tunneling PCIe, CXL and other protocols in raw mode\u003C/li>\r\n\u003Cli>UCIe port design constituting Protocol, Die-to-Die Adapter, Logical and Electrical Physical Layers\u003C/li>\r\n\u003Cli>Sideband interface usage and protocol\u003C/li>\r\n\u003Cli>Software view of UCIe when paired with PCIe or CXL protocol layers\u003C/li>\r\n\u003Cli>UCIe Interface (RDI and FDI) architecture between the Die-to-Die Adapter layer and Physical layer. (This topic is optionally covered.)\u003C/li>\r\n\u003C/ul>","\u003Cp>A good working knowledge of PCI Express (PCIe) and Compute Express Link (CXL) is a must. Computer architecture fundamentals. Some knowledge of Intel, AMD or Arm processor architectures.\u003C/p>","\u003Cul>\r\n\u003Cli>UCIe Features and Architecture Overview\r\n\u003Cul>\r\n\u003Cli>Package and platform architecture based on UCIe\u003C/li>\r\n\u003Cli>Overview of UCIe port architecture\r\n\u003Cul>\r\n\u003Cli>Protocol layer\u003C/li>\r\n\u003Cli>Die-to-Die Adapter layer\u003C/li>\r\n\u003Cli>Logical and Electrical Physical layer\u003C/li>\r\n\u003Cli>Sideband interface\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>UCIe Retimers\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>UCIe Protocol Layer : Protocols and Flit Formats\r\n\u003Cul>\r\n\u003Cli>Protocols or Modes of operation\r\n\u003Cul>\r\n\u003Cli>68B-Flit Mode\"\u003C/li>\r\n\u003Cli>CXL 256B Flit Mode\u003C/li>\r\n\u003Cli>PCIe Flit Mode\u003C/li>\r\n\u003Cli>Streaming Mode\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Flit Formats\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>UCIe Die-to-Die Adapter Layer\r\n\u003Cul>\r\n\u003Cli>Link/Adapter initialization\u003C/li>\r\n\u003Cli>Power management link states\u003C/li>\r\n\u003Cli>Retry rules\u003C/li>\r\n\u003Cli>Parity-based runtime Link testing\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>UCIe Logical Physical Layer\r\n\u003Cul>\r\n\u003Cli>Data and sideband transmission flows\u003C/li>\r\n\u003Cli>Lane reversal\u003C/li>\r\n\u003Cli>Interconnect redundancy map\u003C/li>\r\n\u003Cli>Data to clock training and test modes\u003C/li>\r\n\u003Cli>Link Initialization and Training\u003C/li>\r\n\u003Cli>Runtime recalibration\u003C/li>\r\n\u003Cli>Multi-module Link initialization\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>UCIe Electrical Physical Layer\r\n\u003Cul>\r\n\u003Cli>Interoperability of data rates\u003C/li>\r\n\u003Cli>Tx spec\u003C/li>\r\n\u003Cli>Rx spec\u003C/li>\r\n\u003Cli>Clocking\u003C/li>\r\n\u003Cli>Supply noise and clock skew\u003C/li>\r\n\u003Cli>Ball-out and channel spec\u003C/li>\r\n\u003Cli>Tightly coupled mode\u003C/li>\r\n\u003Cli>Interconnect reducancy mapping\u003C/li>\r\n\u003Cli>BER requirements\u003C/li>\r\n\u003Cli>Valid and clock gating\u003C/li>\r\n\u003Cli>Electrical Idle\u003C/li>\r\n\u003Cli>Sideband signaling\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Sideband Interface\r\n\u003Cul>\r\n\u003Cli>Packet types and formats\u003C/li>\r\n\u003Cli>Flow control and data integrity\u003C/li>\r\n\u003Cli>Operation on RDI and FDI\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>UCIe DVSEC and Register Blocks\r\n\u003Cul>\r\n\u003Cli>Software view of UCIe\u003C/li>\r\n\u003Cli>UCIe registers\u003C/li>\r\n\u003Cli>UCIe Interrupt architecture\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>UCIe Interfaces between Protocol Layer, Die-to-Die Adapter and Physical Layer\r\n\u003Cul>\r\n\u003Cli>Raw Die-to-Die Interface (RDI)\u003C/li>\r\n\u003Cli>Flit-Aware Die-to-Die Interface (FDI)\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>","2025-01-02T19:01:12.000000Z","2025-08-21T01:54:12.000000Z","2 days","public/live_training_courses/thumbnails/live_training_course_740_thumbnail_1735844472.png","ucie-universal-chiplet-interconnect-express","\u003Cul>\r\n\u003Cli>PDF of course slides\u003C/li>\r\n\u003Cli>Optional add-on: UCIe 1.0 eLearning course (when available)\u003C/li>\r\n\u003C/ul>",{"id":18,"title":28,"created_at":29,"updated_at":30,"order":19},[],{"id":318,"name":319,"description":320,"about":321,"you_will_learn":322,"prerequisites":323,"is_active":12,"modified_at":13,"course_outline":324,"created_at":325,"updated_at":292,"duration":326,"category_id":18,"order":69,"thumbnail":327,"slug":328,"old_live_courses_id":329,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":330,"meta_keywords":331,"meta_description":332,"training_materials":333,"category":334,"elearning_courses":335},724,"USB4","\u003Cp>Universal Serial Bus (USB) remains the most widely used cabled IO bus and is found in systems ranging from embedded controllers to workstations and servers. While USB 3.2 is the latest specification version for generic USB 2.0 and Enhanced SuperSpeed (ESS), the addition of USB4 introduces an entirely new capability--interleaved USB 3.2, PCI Express (PCIe), and DisplayPort (DP) packets on the multi-protocol USB4 link. One of the most important use cases for multiplexed IO protocols over a single bus applies to laptops, notebooks, tablets, and other small form factors where space is limited for both internal peripherals and external IO connectors. In this scenario, a USB4 dock may be connected to the host; downstream of the dock may be native protocol PCIe, USB 3.2, and DisplayPort peripherals: SSD, GPU, LAN adapter, multiple displays, etc. If a dock isn’t needed, a USB4 port can be dedicated to a high bandwidth peripheral or charging power.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>USB4 employs an enhanced version of Intel’s Thunderbolt 3 packet tunneling scheme to support multiple protocols on a physical interface based on USB-C defined connectors, cables, and power delivery (USB PD). The USB-C connection used by USB4 also supports the backward compatibility required if native USB 3.x, USB 2.0, or DisplayPort alternate mode devices are attached to USB4-capable USB-C ports.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>This 4-day course is a top-down, detailed look at USB4—including the roles played by two enabling specifications: USB Type-C Cable and Connector and USB Power Delivery. The first day of training presents an overview of key topics, many of which are covered in more detail in days 2-4. For those just needing an introduction to the major features of USB4, day 1 will provide it. Most of the same overview content is also available in a separate 1-day MindShare course entitled USB4 Fundamentals. Note that low-level details about native USB 3.2, PCIe, and DisplayPort protocols are not covered in this class. However, MindShare does offer in-depth courses on individual bus architectures, including both USB 3.2 and PCIe. For details on training options, visit our website or contact us directly.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"USB4\" to Life for You \u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>How a Type-C port determines it should operate as USB4\u003C/li>\r\n\u003Cli>Details of tunneling PCIe, DisplayPort and USB3 (ESS) across USB4 links\u003C/li>\r\n\u003Cli>How the Connection Manager discovers and enumerates USB4 Routers\u003C/li>\r\n\u003Cli>Interaction between the Host I/F Adapter and the Connection Manager using Tx and Rx Rings\u003C/li>\r\n\u003Cli>Routing of USB4 TLPs based on HopID and routing tables\u003C/li>\r\n\u003Cli>Flow control schemes employed in USB4\u003C/li>\r\n\u003Cli>Low-level initialization and training of a USB4 link\u003C/li>\r\n\u003C/ul>","\u003Cp>Some background in USB, PCIe, or Thunderbolt protocols is very helpful but not required.\u003C/p>","\u003Cul>\r\n\u003Cli>USB4 Overview (Day 1 Content)\r\n\u003Cul>\r\n\u003Cli>USB4 Motivations, Goals, Key Specifications\u003C/li>\r\n\u003Cli>Dual-bus System Architecture: USB4 plus USB 2.0\u003C/li>\r\n\u003Cli>Fabric Elements: Hosts, Hubs, Devices\u003C/li>\r\n\u003Cli>USB4 Router and Adapter Architecture\u003C/li>\r\n\u003Cli>Router Bypass Paths\u003C/li>\r\n\u003Cli>USB4 View of USB-C Port Logic, Signal Groups, and Cables\u003C/li>\r\n\u003Cli>Layered Protocol Overview\u003C/li>\r\n\u003Cli>Transport Layer Packet Types and Routing Concepts\u003C/li>\r\n\u003Cli>USB4 Configuration Spaces\u003C/li>\r\n\u003Cli>Host Interface and Configuration Manager Roles\u003C/li>\r\n\u003Cli>Brief Introduction to USB4 Physical Layer (Logical and Electrical Sections)\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Transport Layer Details\r\n\u003Cul>\r\n\u003Cli>Packet Types, Formats, and Usage Models\r\n\u003Cul>\r\n\u003Cli>Tunneled Packets\u003C/li>\r\n\u003Cli>Control Packets\u003C/li>\r\n\u003Cli>Link Management Packets\u003C/li>\r\n\u003Cli>Idle Packets\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Maximum Packet Sizes, Padding, Inter-packet Gap\u003C/li>\r\n\u003Cli>Routing\r\n\u003Cul>\r\n\u003Cli>Adapter Numbering\u003C/li>\r\n\u003Cli>Router Numbering\u003C/li>\r\n\u003Cli>HopID Packet Steering\u003C/li>\r\n\u003Cli>Routing Tables\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Quality of Service (QoS)\r\n\u003Cul>\r\n\u003Cli>Ordering Rules: Single vs. Multiple Path\u003C/li>\r\n\u003Cli>Link Level Flow Control: Buffers and Credits\u003C/li>\r\n\u003Cli>Example: Packet Flow and Credit Updates\u003C/li>\r\n\u003Cli>Egress Adapter Packet Arbitration & Scheduling\u003C/li>\r\n\u003Cli>Connection Manager Path Tear-down\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Packet Tunneling\r\n\u003Cul>\r\n\u003Cli>Tunneling Support Requirements for Hosts, Hubs, Devices\u003C/li>\r\n\u003Cli>PCIe Tunneling\r\n\u003Cul>\r\n\u003Cli>PCIe Tunneled Traffic: TLPs, DLLPs, Ordered Sets, Out-of-Band (OOB) events\u003C/li>\r\n\u003Cli>PCIe Adapter Requirements for TLP and DLLP Encapsulation\u003C/li>\r\n\u003Cli>PCIe Adapter Requirements for Ordered Sets: TS, EIOS, EI, PERST\u003C/li>\r\n\u003Cli>Handling PCIe Hot Plug\u003C/li>\r\n\u003Cli>Handling Internal PCIe Ports\u003C/li>\r\n\u003Cli>PCIe Precision Time Management (PTM) Considerations\u003C/li>\r\n\u003Cli>PCIe Tunneling Example\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>USB3 Tunneling\r\n\u003Cul>\r\n\u003Cli>USB3 Tunneled Traffic: LFPS, OS, Link Commands, LMPs, TP, ITP, DP\u003C/li>\r\n\u003Cli>USB3 Adapter Requirements for LFPS and OS Encapsulation\u003C/li>\r\n\u003Cli>USB3 Adapter Requirements for Link Command, TP, DP Encapsulation\u003C/li>\r\n\u003Cli>Handling USB3 PM Transitions, Bandwidth Negotiation\u003C/li>\r\n\u003Cli>Bandwidth Negotiation Events\u003C/li>\r\n\u003Cli>Handling Internal USB3 Device\u003C/li>\r\n\u003Cli>USB3 Tunneling Example\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>DisplayPort (DP) Tunneling\r\n\u003Cul>\r\n\u003Cli>DP Adapter Protocol Stack\u003C/li>\r\n\u003Cli>DP Adapter State Machine\u003C/li>\r\n\u003Cli>DP Tunneled Packet Formats for AUX Path and Main-Link Path Packet Types\u003C/li>\r\n\u003Cli>DP Tunneling Example\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Host Interface\r\n\u003Cul>\r\n\u003Cli>Host Interface Adapter Implemented In Host Router\u003C/li>\r\n\u003Cli>Provides Connection Manager Access to USB4 Fabric (Tunneled & Control Packets)\u003C/li>\r\n\u003Cli>Host Interface May Be PCIe Based\u003C/li>\r\n\u003Cli>Transmit (Tx) and Receive (Rx) Rings in Memory Used to Queue Fabric Traffic\u003C/li>\r\n\u003Cli>One Tx/Rx Ring for Each USB4 Fabric Path (HopID 0 to HopID n)\u003C/li>\r\n\u003Cli>Tx/Rx Descriptor Ring Modes: Raw and Frame\u003C/li>\r\n\u003Cli>Host-to-Host Transaction Support\u003C/li>\r\n\u003Cli>Interrupts\r\n\u003Cul>\r\n\u003Cli>PCIe-Based Host Routers support both MSI/MSI-X and INTx\u003C/li>\r\n\u003Cli>Tx and Rx Descriptor Interrupt Enable bit used to trigger interrupt upon completion\u003C/li>\r\n\u003Cli>Number of Vectors: MSI (1 max), MSI-X (16 max)\u003C/li>\r\n\u003Cli>Interrupt Moderation (Limits Rate of Interrupt Delivery to Host)\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Programming Interface (Assumes Host Interface Adapter Layer is PCIe based)\r\n\u003Cul>\r\n\u003Cli>PCI Space Base Address Register (BAR) tracks MMIO/ main memory blocks\u003C/li>\r\n\u003Cli>Interrupt Management\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Configuration Layer Details\r\n\u003Cul>\r\n\u003Cli>Domains: Six Levels for Host and Device Routers (Depth 0 to Depth 5)\u003C/li>\r\n\u003Cli>USB4 Router Topology IDs (7 Adapter Numbers in Route String Format)\u003C/li>\r\n\u003Cli>Control Packets\r\n\u003Cul>\r\n\u003Cli>Control Packet Payload\u003C/li>\r\n\u003Cli>Read Request/Response Formats\u003C/li>\r\n\u003Cli>Write Request/Response Formats\u003C/li>\r\n\u003Cli>Notification Packet/Response Formats & Event Types\u003C/li>\r\n\u003Cli>Hot Plug Event Packet Format\u003C/li>\r\n\u003Cli>Inter-Domain (Host-to-Host) Request/Response Packet Formats\u003C/li>\r\n\u003Cli>Control Packet Routing Example\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Physical Layer (Logical Section)\r\n\u003Cul>\r\n\u003Cli>Sideband (SB) Channel Communications & Management\u003C/li>\r\n\u003Cli>USB4 Link Initialization\u003C/li>\r\n\u003Cli>Inbound and Outbound Transport Layer Packet Processing\u003C/li>\r\n\u003Cli>Clock Compensation: Skip OS Insertion/Removal\u003C/li>\r\n\u003Cli>De-skew Requirements\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Link Initialization and Training (5 Phases)\r\n\u003Cul>\r\n\u003Cli>Phase 1: Initial Conditions (USB-C and USB Power Delivery Specifications)\u003C/li>\r\n\u003Cli>Phase 2: USB4 Router Detection\u003C/li>\r\n\u003Cli>Phase 3: Determination of USB4 Port Characteristics\u003C/li>\r\n\u003Cli>Phase 4: Lane Synchronization & Training Start\u003C/li>\r\n\u003Cli>Phase 5: USB4 Link Equalization\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>USB4 Lane Adapter State Machine (per lane)\r\n\u003Cul>\r\n\u003Cli>Lane Adapter State Machine States\u003C/li>\r\n\u003Cli>Training Ordered Sets\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Other USB4 Topics\r\n\u003Cul>\r\n\u003Cli>Time Synchronization\u003C/li>\r\n\u003Cli>Physical Layer (Electrical Section)\u003C/li>\r\n\u003Cli>USB4 and Thunderbolt 3 Interoperability\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>","2022-07-28T12:01:30.000000Z","4 days","public/live_training_courses/thumbnails/live_training_course_724_thumbnail_1747666915.jpg","usb4",96,"USB4 Training","USB4 training","MindShare USB4 Training","\u003Cul>\r\n\u003Cli>PDF of course slides\u003C/li>\r\n\u003Cli>Optional add-on: \u003Ca href=\"../../elearning-course/usb4-architecture-elearning-course\">USB4 eLearning course\u003C/a> (discounted pricing applies)\u003C/li>\r\n\u003C/ul>",{"id":18,"title":28,"created_at":29,"updated_at":30,"order":19},[336],{"id":337,"name":338,"about":339,"instructor_fullname":102,"instructor_email":103,"price":83,"price_arbor":83,"created_at":39,"updated_at":340,"you_will_learn":341,"equivelent_of":89,"subscription_length":43,"video_id":342,"is_active":12,"prerequisites":343,"modified_at":344,"order":19,"presentation_id":345,"slug":346,"course_category_id":86,"release_date":129,"old_product_id":347,"meta_description":348,"meta_keywords":349,"author_signature":115,"description":350,"meta_title":338,"whats_included":351,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":352},1751,"USB4 Architecture eLearning Course","\u003Cdiv>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"USB4\" to Life for You\u003C/strong>\u003C/span>\u003C/div>","2025-10-31T13:14:54.000000Z","\u003Cdiv>\r\n\u003Cul>\r\n\u003Cli>How a Type-C port determines it should operate as USB4\u003C/li>\r\n\u003Cli>Details of tunneling PCIe, DisplayPort and USB3 (ESS) across USB4 links\u003C/li>\r\n\u003Cli>How the Connection Manager discovers and enumerates USB4 Routers\u003C/li>\r\n\u003Cli>Interaction between the Host I/F Adapter and the Connection Manager using Tx and Rx Rings\u003C/li>\r\n\u003Cli>Routing of USB4 TLPs based on HopID and routing tables\u003C/li>\r\n\u003Cli>Flow control schemes employed in USB4\u003C/li>\r\n\u003Cli>Low-level initialization and training of a USB4 link\u003C/li>\r\n\u003C/ul>\r\n\u003C/div>",37757,"\u003Cp>None is required, but some background in USB, PCIe, or Thunderbolt protocols would be helpful.\u003C/p>","2025-08-04 16:43:23",497,"usb4-architecture-elearning-course",796,"USB4 Architecture eLearning","USB4, USB 4.0, training, tutorial, eLearning, online","\u003Cp>If you are going to take one course on USB4, this should be it. MindShare's USB4 eLearning course is an exhaustive tutorial on USB4 from the electrical PHY all the way up to the Connection Manager (CM). It starts with a high-level view of the architecture, including the background of Thunderbolt to provide the big-picture context and then drills down into the details for each part of the design, providing a thorough understanding of the hardware and software protocols.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/usb4_modules.png\" alt=\"PCIe Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/usb4_slides.png\" alt=\"PDF Slides Thumbnail\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg style=\"max-height: 150px;\" src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/usb3_front_ds_130x145.jpg\" alt=\"PCIe eBook\" width=\"131\" height=\"146\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>USB4 Architecture eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>USB 3.0 eBook\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume / CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":318,"elearning_course_id":337},{"id":354,"name":355,"description":356,"about":357,"you_will_learn":358,"prerequisites":359,"is_active":12,"modified_at":13,"course_outline":360,"created_at":361,"updated_at":292,"duration":362,"category_id":18,"order":363,"thumbnail":364,"slug":365,"old_live_courses_id":366,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":367,"category":368,"elearning_courses":369},712,"USB Type-C and Power Delivery","\u003Cp>This introductory course is primarily concerned with topics described in two documents: USB Type-C Cable and Connector Specification and the USB Power Delivery Specification. The USB Type-C connectors address several limitations of traditional USB Type A and Type B connectors related to size, mechanical reliability, and the need to maintain proper cable and plug orientation. Type-C connector and cables have no required orientation and support USB 2.0, USB 3.1, as well as sideband signals for communications, audio, HDMI, or other purposes. In addition, Type-C brings a new set of power delivery capabilities as defined in USB Power Delivery Specification, including negotiated switching of upstream/downstream port roles and the device responsible for sourcing VBUS power.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>\u003Cspan class=\"sectionsubhead\">Let MindShare Bring \"USB Type-C\" to Life for You\u003C/span>\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>Features of Type-C and Power Delivery\u003C/li>\r\n\u003Cli>Advantages of Type-C Cables\u003C/li>\r\n\u003Cli>Motivations for Power Delivery\u003C/li>\r\n\u003Cli>Advantages of Electrically Marked Cables\u003C/li>\r\n\u003Cli>Start Of Packet Messages\u003C/li>\r\n\u003Cli>Power Contract Negotiation\u003C/li>\r\n\u003C/ul>","\u003Cp>Background in USB 3.x protocol is required\u003C/p>","\u003Cp>Part 1: USB Type-C Interconnect\u003C/p>\r\n\u003Cul>\r\n\u003Cli>Evolution of USB Cables, Speed and Power\r\n\u003Cul>\r\n\u003Cli>New USB Type-C cables and Receptacles\u003C/li>\r\n\u003Cli>Smaller, Thinner, Lighter Receptacles, Plugs & Cables\u003C/li>\r\n\u003Cli>Higher Speeds: USB 3.1 Gen 1 (5Gb/s) and Gen 2 (10Gb/s)\u003C/li>\r\n\u003Cli>Power Distribution—Ranging from 5V@100 mA (5W) to 20V@5A (100W)\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Introduction to USB Type-C Interconnects\r\n\u003Cul>\r\n\u003Cli>USB Type-C Receptacle\u003C/li>\r\n\u003Cli>USB Full-Featured Type-C Plug\u003C/li>\r\n\u003Cli>Flexible Cable and Plug Orientation\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>USB Type-C Receptacles, Plugs and Cables\r\n\u003Cul>\r\n\u003Cli>USB Full-Featured Type-C cable and Type-C plugs at both ends, for USB 3.1 and full-featured applications\u003C/li>\r\n\u003Cli>USB 2.0 Type-C cable with a USB 2.0 Type-C plug at both ends for USB 2.0 applications\u003C/li>\r\n\u003Cli>Captive cable with either a USB Full-Featured Type-C plug or USB 2.0 Type-C plug at one end\u003C/li>\r\n\u003Cli>USB Type-C to USB Legacy Cables/Adaptor (7 Cables/2 Adapters)\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Summary of Type-C Functional Characteristics\r\n\u003Cul>\r\n\u003Cli>Signal Group Summary\u003C/li>\r\n\u003Cli>Special Considerations For USB 3.x Hubs Supporting Type-C\r\n\u003Cul>\r\n\u003Cli>No Implementation or Forwarding of Alternate Modes or Accessory Mode Traffic\u003C/li>\r\n\u003Cli>No SBU Signal Support (on any port)\u003C/li>\r\n\u003Cli>Must Implement an UFP with Charging Capability (Can Source VBUS)\u003C/li>\r\n\u003Cli>No Dual Role Port Support on Hub DFP\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Chargers\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Functional Extensions\r\n\u003Cul>\r\n\u003Cli>Billboard\u003C/li>\r\n\u003Cli>Alternate Modes\u003C/li>\r\n\u003Cli>Audio Adapter Accessory Model\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>Part 2: USB Power Delivery (PD)\u003C/p>\r\n\u003Cul>\r\n\u003Cli>Overview\r\n\u003Cul>\r\n\u003Cli>Provides For Port Negotiation of Voltage/Current and Power Direction\u003C/li>\r\n\u003Cli>USB Power Delivery Devices\u003C/li>\r\n\u003Cli>PD Source/Sink Definitions\u003C/li>\r\n\u003Cli>Services Provided By Cable PD Electronics\u003C/li>\r\n\u003Cli>Default USB Power Delivery Used Initially\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Power Delivery Profiles\r\n\u003Cul>\r\n\u003Cli>Defined for VBUS Source\u003C/li>\r\n\u003Cli>Standardizes Number of Valid Voltage/Current Ranges\u003C/li>\r\n\u003Cli>The Five Defined PD Profiles\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>PD Layered Communications Stack Overview\r\n\u003Cul>\r\n\u003Cli>System Policy Manager\u003C/li>\r\n\u003Cli>Device Policy Manager\u003C/li>\r\n\u003Cli>Policy Engine\u003C/li>\r\n\u003Cli>Protocol Layer\u003C/li>\r\n\u003Cli>Physical Layer\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Discovery of Power Delivery Capabilities\r\n\u003Cul>\r\n\u003Cli>For the PD Cable\u003C/li>\r\n\u003Cli>For the Facing Port\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Power Delivery Contract Overview\r\n\u003Cul>\r\n\u003Cli>Explicit Contracts\u003C/li>\r\n\u003Cli>Implicit Contracts\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Power Delivery (PD) Messages\r\n\u003Cul>\r\n\u003Cli>Needed for Port-to-Cable Plug Communications\u003C/li>\r\n\u003Cli>Needed for Port-to-Port Communications\u003C/li>\r\n\u003Cli>SOP Communications Model\u003C/li>\r\n\u003Cli>Signaled Using VBUS BFSK or CC (Communication Channel Wire)\u003C/li>\r\n\u003Cli>VBUS BFSK and CC Signaling Basics\u003C/li>\r\n\u003Cli>PD Control Messages\u003C/li>\r\n\u003Cli>PD Data Messages\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Establishing An Explicit Power Delivery Contract\r\n\u003Cul>\r\n\u003Cli>General Downstream Facing Port (DFP) and Upstream Facing Port (UFP) Behavior\u003C/li>\r\n\u003Cli>The Sequence of Events\r\n\u003Cul>\r\n\u003Cli>At Attachment\u003C/li>\r\n\u003Cli>Detecting Cable capabilities\u003C/li>\r\n\u003Cli>Establishing Power Delivery (PD) Connection\u003C/li>\r\n\u003Cli>Negotiating a Contract\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>While The Explicit Power Delivery Contract Is In Effect\r\n\u003Cul>\r\n\u003Cli>Messages and Responses Exchanged\u003C/li>\r\n\u003Cli>Power Role Swap\u003C/li>\r\n\u003Cli>Ping\u003C/li>\r\n\u003Cli>Errors, Reset, Other Special Cases\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>USB Interface Required To Manage Power Delivery\r\n\u003Cul>\r\n\u003Cli>Allows System to Fetch Power Delivery Capabilities and Dynamic Status Information\u003C/li>\r\n\u003Cli>System-level Coordination of USB Power Delivery\u003C/li>\r\n\u003Cli>A Number of new PDUSB Descriptors and Requests needed for PD-capable Peripheral Devices and Hubs\u003C/li>\r\n\u003Cli>Two Special Hub Class Requests enable Host to Request PD Port to Send/Receive a Vendor Device Message (VDM) using SOP Signaling\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>","2022-07-28T12:00:59.000000Z","1 day",7,"public/live_training_courses/thumbnails/live_training_course_712_thumbnail_1747667130.png","usb-type-c-and-power-delivery",76,"\u003Cul>\r\n\u003Cli>PDF of course slides\u003C/li>\r\n\u003Cli>\"\u003Ca href=\"../../ebook/usb-30-technology\">USB 3.0 Technology\u003C/a>\" eBook\u003C/li>\r\n\u003C/ul>",{"id":18,"title":28,"created_at":29,"updated_at":30,"order":19},[370],{"id":371,"name":372,"about":373,"instructor_fullname":374,"instructor_email":375,"price":376,"price_arbor":376,"created_at":39,"updated_at":377,"you_will_learn":358,"equivelent_of":42,"subscription_length":43,"video_id":378,"is_active":12,"prerequisites":164,"modified_at":13,"order":42,"presentation_id":379,"slug":380,"course_category_id":86,"release_date":129,"old_product_id":381,"meta_description":372,"meta_keywords":382,"author_signature":383,"description":384,"meta_title":372,"whats_included":385,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":386},1730,"USB Type-C and Power Delivery eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"USB Type-C\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","Jay Trodden","eLearning@mindshare.com","295","2025-10-31T13:11:08.000000Z",37736,439,"usb-type-c-and-power-delivery-elearning-course",617,"usb type-c, power delivery, elearning, training, tutorial","Jay-Trodden","\u003Cp>This introductory course is primarily concerned with topics described in two documents: USB Type-C Cable and Connector Specification and the USB Power Delivery Specification. The USB Type-C connectors address several limitations of traditional USB Type A and Type B connectors related to size, mechanical reliability, and the need to maintain proper cable and plug orientation. Type-C connector and cables have no required orientation and support USB 2.0, USB 3.1, as well as sideband signals for communications, audio, HDMI, or other purposes. In addition, Type-C brings a new set of power delivery capabilities as defined in USB Power Delivery Specification, including negotiated switching of upstream/downstream port roles and the device responsible for sourcing VBUS power.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/usbtypec_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/usbtypec_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>USB Type-C eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":354,"elearning_course_id":371},{"id":388,"name":389,"description":390,"about":391,"you_will_learn":13,"prerequisites":392,"is_active":12,"modified_at":13,"course_outline":393,"created_at":394,"updated_at":292,"duration":395,"category_id":18,"order":396,"thumbnail":397,"slug":398,"old_live_courses_id":399,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":400,"meta_keywords":13,"meta_description":13,"training_materials":401,"category":402,"elearning_courses":403},700,"USB 3.2","\u003Cp>Each generation of the USB is backward compatible and a USB 3.2 topology may include devices operating at USB 2.0 Low Speed (LS), Full speed (FS), and High Speed (HS) as well as USB 3.x SuperSpeed (SS) Gen 1 and Gen 2. Prior to USB 3.2, USB cables, plugs, and receptacles were based on single-lane serial bus communications with an independent set of signals for USB 2.0 and SS Gen 1/Gen 2 communications. USB 3.2 adds an option for doubling the bandwidth of single-lane 5 Gb/s SS Gen 1 or 10 Gb/s SS Gen 2 by employing the extra Tx/Rx signal pair already present in USB Type-C (USB-C) interfaces. The result: a dual-lane SS Gen 1 or Gen 2 interface (referred to in the USB 3.2 Specification as Gen 1x2 or Gen 2x2, respectively). In this scheme, data is alternately “striped” across two lanes and sent in parallel—it effectively doubles bus bandwidth for a given clock speed. The peak transfer rate under USB 3.2 is now Gen 2x2: 10 Gb/s x 2 lanes = 20 Gb/s. Note that traditional single-lane SS Gen 1 (Gen 1x1) and SS Gen 2 (Gen 2x1) are still available and that the scheme has no impact on legacy USB protocol on the USB 2.0 signals.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>In addition to the new Enhanced SuperSpeed (ESS) Gen 1x2, Gen 2x2 features, USB 3.2 carries forward the many SuperSpeed protocol optimizations first introduced in USB 3.0/USB 3.1 and designed to mitigate some of the disadvantages of USB 2.0 bus operations. These include unicast instead of broadcast packets, device asynchronous messages, packet bursting, end-to-end and link level flow control, link level error handling, link-level power management, and many others. Several significant enhancements to SuperSpeed Plus (SSP) hubs have also been added in the USB 3.2 specification. All of the above topics are covered in the USB 3.2 part of the class.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>All generations of USB rely on platform host controllers to manage devices attached to each bus instance. USB 2.0 employed UHCI/OHCI and EHCI compliant host controllers to handle low, full, and high speed devices. The advanced capabilities of USB 3.x require new generations of USB host controllers. Course topics on the last day include Intel’s eXtensible Host Controller Interface (xHCI). A single host controller based on xHCI can manage both USB 2.0 and Enhanced SuperSpeed (ESS) topologies as well as attached devices of any USB speed. The xHCI operational model, software interface (registers, memory data structures), doorbell-based work notification, and hardware transaction scheduling are all described.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>\u003Cspan class=\"sectionsubhead\">Let MindShare Bring \"USB 3.2\" to Life for You\u003C/span>\u003C/strong>\u003C/span>\u003C/p>","\u003Cp>Background in USB 2.0 protocol is helpful but not required.\u003C/p>","\u003Cp>\u003Cem>\u003Cstrong>Comprehensive USB 3.2\u003C/strong>\u003C/em>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>Background\r\n\u003Cul>\r\n\u003Cli>USB 2.0 Introduction and Protocol Limitations\u003C/li>\r\n\u003Cli>USB 3.0 SuperSpeed Baseline Feature Set\u003C/li>\r\n\u003Cli>USB 3.1 Enhancements\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>USB 3.2 Introduction\r\n\u003Cul>\r\n\u003Cli>New Feature List\u003C/li>\r\n\u003Cli>USB 3.2 Platform Elements\r\n\u003Cul>\r\n\u003Cli>Hosts\u003C/li>\r\n\u003Cli>Hubs\u003C/li>\r\n\u003Cli>Peripherals\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>USB 3.2 SuperSpeed Interface Basics\r\n\u003Cul>\r\n\u003Cli>Dual-Simplex connection\u003C/li>\r\n\u003Cli>Packet Based Protocol\u003C/li>\r\n\u003Cli>Signals: x1 and x2 Links\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>End-to-End Protocol\r\n\u003Cul>\r\n\u003Cli>SS Gen 1 End-to-End Protocol\r\n\u003Cul>\r\n\u003Cli>Introduction to Protocol Layer Packets\u003C/li>\r\n\u003Cli>SS Gen 1 IN/OUT Transactions\u003C/li>\r\n\u003Cli>SS Gen 1x2 Link Impact on End-to-End Protocol\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>SS Gen 2 End-to-End Protocol Changes\r\n\u003Cul>\r\n\u003Cli>Three Key Gen 2 Enhancements\u003C/li>\r\n\u003Cli>SS Gen 2x2 Link Impact on End-to-End Protocol\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Port-to-Port Protocol\r\n\u003Cul>\r\n\u003Cli>SS Gen 1 Port-to-Port Protocol\r\n\u003Cul>\r\n\u003Cli>LTSSM and ESS Link States\u003C/li>\r\n\u003Cli>Link Traffic Overview\u003C/li>\r\n\u003Cli>Header Packet Processing\u003C/li>\r\n\u003Cli>Header Packet Flow Control\u003C/li>\r\n\u003Cli>Packet Acknowledgment and Retry\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>SS Gen 2 Port-to-Port Protocol Changes\r\n\u003Cul>\r\n\u003Cli>Key Changes\u003C/li>\r\n\u003Cli>SS Gen 2x2 Link Impact on Port-to-Port Protocol\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Chip-to-Chip Protocol\r\n\u003Cul>\r\n\u003Cli>SS Gen 1 Chip-to-Chip Protocol\r\n\u003Cul>\r\n\u003Cli>SS Gen 1 Tx PHY Logic\u003C/li>\r\n\u003Cli>SS Gen 1 Rx PHY Logic\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>SS Gen 2 Chip-to-Chip Protocol Changes\r\n\u003Cul>\r\n\u003Cli>The Big Differences\u003C/li>\r\n\u003Cli>SS Gen 2x2 Link Impact on Chip-to-Chip Protocol\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>ESS Link Reset Events\r\n\u003Cul>\r\n\u003Cli>Power On Reset\u003C/li>\r\n\u003Cli>Warm Reset\u003C/li>\r\n\u003Cli>Hot Reset\u003C/li>\r\n\u003Cli>Reset Propagation\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Link Training and Recovery/Retraining\r\n\u003Cul>\r\n\u003Cli>SS Gen 1 Link Training\r\n\u003Cul>\r\n\u003Cli>LTSSM States For Link Training\u003C/li>\r\n\u003Cli>SS Gen 1 Logic To Be Trained\u003C/li>\r\n\u003Cli>SS Gen 1 Link Training Sequence\u003C/li>\r\n\u003Cli>SS Gen 1x2 Impact on Link Training\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>SS Gen 1 Link Recovery/Retraining\r\n\u003Cul>\r\n\u003Cli>Motivation for Recovery\u003C/li>\r\n\u003Cli>Rx Logic Requiring Retraining\u003C/li>\r\n\u003Cli>LTSSM States For Recovery/Retraining\u003C/li>\r\n\u003Cli>SS Gen 1 Recovery/Retraining Sequence\u003C/li>\r\n\u003Cli>SS Gen 1x2 Impact on Link Recovery/Retraining\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>SS Gen 2 Link Training Differences\r\n\u003Cul>\r\n\u003Cli>Overview of SS Gen 2 Link Training\u003C/li>\r\n\u003Cli>SS Gen 2 Link Training Sequence\u003C/li>\r\n\u003Cli>SS Gen 2x2 Impact on Link Training\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>SS Gen 2 Link Recovery/Retraining Differences\r\n\u003Cul>\r\n\u003Cli>SS Gen 2 Recovery/Retraining Sequence\u003C/li>\r\n\u003Cli>SS Gen 2x2 Impact on Link Recovery/Retraining\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Enumeration and Configuration\r\n\u003Cul>\r\n\u003Cli>ESS Device Configuration Overview\u003C/li>\r\n\u003Cli>When Attachment is Detected\u003C/li>\r\n\u003Cli>USB 3.2 ESS Descriptors\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>ESS Power Management\r\n\u003Cul>\r\n\u003Cli>Link Power Management\u003C/li>\r\n\u003Cli>Function Suspend\u003C/li>\r\n\u003Cli>Function Wake\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>USB 3.2 Hubs\r\n\u003Cul>\r\n\u003Cli>USB 3.2 Hub Key Features\u003C/li>\r\n\u003Cli>Deferred Transactions\u003C/li>\r\n\u003Cli>SS Hub Architecture\u003C/li>\r\n\u003Cli>SSP Hub Architecture\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cem>\u003Cstrong>eXtensible Host Controller Interface (xHCI) for USB\u003C/strong>\u003C/em>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>Overview of xHCI\r\n\u003Cul>\r\n\u003Cli>Motivations and Goals\u003C/li>\r\n\u003Cli>Dual Bus Topology\u003C/li>\r\n\u003Cli>xHC Implementation Options\u003C/li>\r\n\u003Cli>Root Hub Ports\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>xHCI Resources, Big Picture\u003C/li>\r\n\u003Cli>xHC Internal Registers\r\n\u003Cul>\r\n\u003Cli>PCI Configuration Registers\u003C/li>\r\n\u003Cli>MMIO Registers\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>xHCI Memory Data Structures\r\n\u003Cul>\r\n\u003Cli>Slot IDs, Doorbells, and Scheduling\u003C/li>\r\n\u003Cli>Command Ring\u003C/li>\r\n\u003Cli>Event Rings\u003C/li>\r\n\u003Cli>Device Context Data Structure\u003C/li>\r\n\u003Cli>Transfer Rings\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>xHCI Interrupts\r\n\u003Cul>\r\n\u003Cli>Interrupters and Event Rings\u003C/li>\r\n\u003Cli>MSI-X Configuration\u003C/li>\r\n\u003Cli>Interrupt Moderation\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>xHC Reset and Initialization\r\n\u003Cul>\r\n\u003Cli>Host Controller Reset Types\u003C/li>\r\n\u003Cli>Host Controller Initialization\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Device Attachment & Initialization\r\n\u003Cul>\r\n\u003Cli>Root Hub Port Status Change\u003C/li>\r\n\u003Cli>Enable Slot & Address Device Commands\u003C/li>\r\n\u003Cli>Device Context Setup\u003C/li>\r\n\u003Cli>Configuration Selection\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cem>\u003Cstrong>Appendices\u003C/strong>\u003C/em>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>A: SuperSpeed (SS) Packet Formats\u003C/li>\r\n\u003Cli>B: ESS Bulk EP Streaming and UAS\u003C/li>\r\n\u003Cli>C: Latency Tolerance Message (LTM)\u003C/li>\r\n\u003Cli>D: ESS Signaling\u003C/li>\r\n\u003Cli>E: USB Type-C & Power Delivery Overview\u003C/li>\r\n\u003C/ul>","2022-07-28T12:04:34.000000Z","5 days",8,"public/live_training_courses/thumbnails/live_training_course_700_thumbnail_1747667288.png","usb-32",42,"USB 3.2 Training","\u003Cul>\r\n\u003Cli>PDF of course slides\u003C/li>\r\n\u003Cli>\"\u003Ca href=\"../../ebook/usb-30-technology\">USB 3.0 Technology\u003C/a>\" eBook\u003C/li>\r\n\u003Cli>Optional add-on: \u003Ca href=\"../../elearning-course/comprehensive-usb-31-elearning-course\">USB 3.1 eLearning course\u003C/a> (discounted pricing applies)\u003C/li>\r\n\u003Cli>Optional add-on: \u003Ca href=\"../../elearning-course/usb-32-update\">USB 3.2 Update eLearning course\u003C/a> (discounted pricing applies)\u003C/li>\r\n\u003C/ul>",{"id":18,"title":28,"created_at":29,"updated_at":30,"order":19},[404,421,437,453],{"id":405,"name":406,"about":407,"instructor_fullname":408,"instructor_email":409,"price":122,"price_arbor":122,"created_at":39,"updated_at":410,"you_will_learn":411,"equivelent_of":86,"subscription_length":43,"video_id":412,"is_active":12,"prerequisites":45,"modified_at":13,"order":86,"presentation_id":413,"slug":414,"course_category_id":86,"release_date":51,"old_product_id":415,"meta_description":406,"meta_keywords":416,"author_signature":417,"description":418,"meta_title":406,"whats_included":419,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":420},1737,"USB 3.1 eLearning Course","\u003Cdiv>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"USB 3.1\" to Life for You\u003C/strong>\u003C/span>\u003C/div>","Pamela Frinzi","elearning@mindshare.com","2025-10-31T13:12:07.000000Z","\u003Cul>\r\n\u003Cli>USB 3.1 protocol\u003C/li>\r\n\u003C/ul>",37743,467,"comprehensive-usb-31-elearning-course",674,"usb training, elearning, superspeed","Pamela-Frinzi","\u003Cp>This in-depth course is designed with the hardware or software engineer in mind. The course contains practical examples of USB 3.1 transactions and error conditions. It describes the rules required for a host and device to be specification compliant.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/usb31_modules.png\" alt=\"PCIe Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/usb31_slides.png\" alt=\"PDF Slides Thumbnail\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg style=\"max-height: 150px;\" src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/usb3_front_ds_130x145.jpg\" alt=\"PCIe eBook\" width=\"131\" height=\"146\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>USB 3.1 eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>USB 3.0 eBook\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume / CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":388,"elearning_course_id":405},{"id":422,"name":423,"about":424,"instructor_fullname":374,"instructor_email":375,"price":64,"price_arbor":64,"created_at":39,"updated_at":425,"you_will_learn":426,"equivelent_of":42,"subscription_length":43,"video_id":427,"is_active":12,"prerequisites":428,"modified_at":13,"order":146,"presentation_id":429,"slug":430,"course_category_id":86,"release_date":129,"old_product_id":431,"meta_description":432,"meta_keywords":433,"author_signature":383,"description":434,"meta_title":423,"whats_included":435,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":436},1742,"USB 3.2 Update eLearning Course","\u003Cdiv>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"USB 3.2\" to Life for You\u003C/strong>\u003C/span>\u003C/div>","2025-10-31T13:13:03.000000Z","\u003Cul>\r\n\u003Cli>USB 3.2 Topology Overview\u003C/li>\r\n\u003Cli>USB 3.2 Hub Requirements\u003C/li>\r\n\u003Cli>USB 3.2 Protocol and Link Layer Changes\u003C/li>\r\n\u003Cli>USB 3.2 Physical Layer\u003C/li>\r\n\u003Cli>USB 3.2 Link Training\u003C/li>\r\n\u003C/ul>",37748,"\u003Cp>A good understanding of USB 3.1 and prior.\u003C/p>",480,"usb-32-update",706,"USB 3.2 Update","usb 3.2, ssp, eLearning, training, tutorial","\u003Cp>One of the most significant USB 3.2 enhancements is the option for dual-lane traffic on the Enhanced SuperSpeed (ESS) interface. Prior to USB 3.2, all generations of USB were based on single-lane serial bus communications. SuperSpeed and SuperSpeedPlus as defined in the USB 3.1 specification is a dual-simplex connection with one differential signal pair for each direction (Tx/Rx). With USB 3.2 dual-lane signaling uses two differential pairs in each direction.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/usb32up_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/usb32up_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>USB 3.2 Update eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":388,"elearning_course_id":422},{"id":438,"name":439,"about":440,"instructor_fullname":374,"instructor_email":375,"price":64,"price_arbor":64,"created_at":39,"updated_at":441,"you_will_learn":442,"equivelent_of":42,"subscription_length":43,"video_id":443,"is_active":12,"prerequisites":444,"modified_at":13,"order":89,"presentation_id":445,"slug":446,"course_category_id":86,"release_date":51,"old_product_id":447,"meta_description":448,"meta_keywords":449,"author_signature":383,"description":450,"meta_title":439,"whats_included":451,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":452},1719,"xHCI eLearning Course","\u003Cdiv>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"xHCI\" to Life for You\u003C/strong>\u003C/span>\u003C/div>","2025-10-31T13:10:47.000000Z","\u003Cdiv>\r\n\u003Cul>\r\n\u003Cli>Details regarding the implementation and operation of the eXtensible Host Controller Interface (xHCI)\u003C/li>\r\n\u003Cli>How to initialize and configure an xHC for runtime operation\u003C/li>\r\n\u003Cli>The behavior and purpose of all the data structures (PCI config space, MMIO space and system memory structures) associated with an xHC including how to explore them on a live running system\u003C/li>\r\n\u003Cli>The events that occur during an attach and remove event\u003C/li>\r\n\u003Cli>And much more\u003C/li>\r\n\u003C/ul>\r\n\u003C/div>",37725,"\u003Cp>A good understanding of SuperSpeed (USB 3.x) protocol.\u003C/p>",406,"xhci-elearning-course",542,"xHCI eLearning course","xhci, training, eLearning, tutorial, mindshare, extensible host controller","\u003Cp>This one-day course targets software/hardware engineers and others requiring an introduction to Intel’s xHCI USB host controller model. A popular training combination is the three-day Comprehensive USB 3.1 course followed by this one-day xHCI Fundamentals course. Note that MindShare also offers a two-day xHCI course for those needing additional details on the xHCI host controller and software management of registers and memory data structures.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/xhci_modules.png\" alt=\"PCIe Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/xhci_slides.png\" alt=\"PDF Slides Thumbnail\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg style=\"max-height: 150px;\" src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/usb3_front_ds_130x145.jpg\" alt=\"PCIe eBook\" width=\"131\" height=\"146\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>xHCI eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>USB 3.0 eBook\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume / CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":388,"elearning_course_id":438},{"id":371,"name":372,"about":373,"instructor_fullname":374,"instructor_email":375,"price":376,"price_arbor":376,"created_at":39,"updated_at":377,"you_will_learn":358,"equivelent_of":42,"subscription_length":43,"video_id":378,"is_active":12,"prerequisites":164,"modified_at":13,"order":42,"presentation_id":379,"slug":380,"course_category_id":86,"release_date":129,"old_product_id":381,"meta_description":372,"meta_keywords":382,"author_signature":383,"description":384,"meta_title":372,"whats_included":385,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":454},{"live_training_course_id":388,"elearning_course_id":371},{"id":456,"name":457,"description":458,"about":459,"you_will_learn":460,"prerequisites":461,"is_active":12,"modified_at":13,"course_outline":462,"created_at":463,"updated_at":292,"duration":362,"category_id":18,"order":464,"thumbnail":465,"slug":466,"old_live_courses_id":467,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":280,"category":468,"elearning_courses":469},702,"xHCI for USB","\u003Cp>The xHCI (eXtensible Host Controller Interface) for USB consolidates support for all generations of USB Low Speed, Full Speed, High Speed, SuperSpeed, and SuperSpeedPlus peripherals and hubs. The xHCI specification defines both host controller hardware behavior and the interface used by software to manage the controller and devices below it. A wide range of hardware implementations and optional features accommodate platforms ranging from embedded devices to PCs, workstations, and servers. When compared with earlier USB host controller models, xHCI also brings significant enhancements in the areas of platform power management, transaction scheduling, virtualization, and bandwidth management.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cstrong>\u003Cspan style=\"color: rgb(186, 55, 42);\">All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/span>\u003C/strong>\u003C/p>","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>\u003Cspan class=\"sectionsubhead\">Let MindShare Bring \"xHCI\" to Life for You\u003C/span>\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>Details regarding the implementation and operation of the eXtensible Host Controller Interface (xHCI)\u003C/li>\r\n\u003Cli>How to initialize and configure an xHC for runtime operation\u003C/li>\r\n\u003Cli>The behavior and purpose of all the data structures (PCI config space, MMIO space and system memory structures) associated with an xHC including how to explore them on a live running system\u003C/li>\r\n\u003Cli>The events that occur during an attach and remove event\u003C/li>\r\n\u003Cli>And more...\u003C/li>\r\n\u003C/ul>","\u003Cp>Some background in USB 2.0 and/or USB 3.x protocol is helpful.\u003C/p>","\u003Cul>\r\n\u003Cli>Overview of xHCI\u003Cbr>\r\n\u003Cul>\r\n\u003Cli>Motivation and Goals\u003C/li>\r\n\u003Cli>Dual Bus Topology\u003C/li>\r\n\u003Cli>xHC Implementation Options\u003C/li>\r\n\u003Cli>Root Hub Ports\u003C/li>\r\n\u003Cli>Special Considerations: 2.0 vs. ESS Transactions\u003C/li>\r\n\u003Cli>xHC Bus Instances\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>xHC Internal Registers\u003Cbr>\r\n\u003Cul>\r\n\u003Cli>PCI Configuration Space Registers\u003C/li>\r\n\u003Cli>Memory Mapped IO (MMIO) Registers\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>xHCI Memory Data Structures\u003Cbr>\r\n\u003Cul>\r\n\u003Cli>Slot IDs, Doorbells, and Scheduling\u003C/li>\r\n\u003Cli>Command Ring\u003C/li>\r\n\u003Cli>Event Rings\u003C/li>\r\n\u003Cli>Device Contexts\u003C/li>\r\n\u003Cli>Input Context\u003C/li>\r\n\u003Cli>Transfer Rings\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>xHCI Interrupts\u003Cbr>\r\n\u003Cul>\r\n\u003Cli>Interrupters and Event Rings\u003C/li>\r\n\u003Cli>MSI, MSI-X Configuration\u003C/li>\r\n\u003Cli>Interrupt Moderation\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>xHC Reset & Initialization\u003Cbr>\r\n\u003Cul>\r\n\u003Cli>Host Controller Reset Types\u003C/li>\r\n\u003Cli>Host Controller Initialization\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Device Attachment & Initialization\u003Cbr>\r\n\u003Cul>\r\n\u003Cli>Root Hub Port Status Change\u003C/li>\r\n\u003Cli>Enable Slot and Address Device Commands\u003C/li>\r\n\u003Cli>Device Context Setup\u003C/li>\r\n\u003Cli>A Configuration is Selected\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>","2014-11-19T15:05:59.000000Z",9,"public/live_training_courses/thumbnails/live_training_course_702_thumbnail_1747668543.png","xhci-for-usb",44,{"id":18,"title":28,"created_at":29,"updated_at":30,"order":19},[470],{"id":438,"name":439,"about":440,"instructor_fullname":374,"instructor_email":375,"price":64,"price_arbor":64,"created_at":39,"updated_at":441,"you_will_learn":442,"equivelent_of":42,"subscription_length":43,"video_id":443,"is_active":12,"prerequisites":444,"modified_at":13,"order":89,"presentation_id":445,"slug":446,"course_category_id":86,"release_date":51,"old_product_id":447,"meta_description":448,"meta_keywords":449,"author_signature":383,"description":450,"meta_title":439,"whats_included":451,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":471},{"live_training_course_id":456,"elearning_course_id":438},{"id":473,"name":474,"description":475,"about":476,"you_will_learn":477,"prerequisites":478,"is_active":12,"modified_at":13,"course_outline":479,"created_at":480,"updated_at":292,"duration":183,"category_id":18,"order":481,"thumbnail":482,"slug":483,"old_live_courses_id":484,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":485,"category":486,"elearning_courses":487},726,"MIPI I3C","\u003Cp>MIPI I3C (Improved Inter Integrated Circuit) is a two-wire, medium speed, multi-drop control bus originally intended to connect sensors in mobile devices to a processor. The full I3C communications protocol is defined in the MIPI I3C Specification which requires MIPI Alliance membership for access. Another version of the specification, referred to as MIPI I3C Basic, is publicly available. Disclosed features of I3C not covered in MIPI I3C Basic Specification are briefly described in the course but the reader is directed to the MIPI Alliance (and the full version of the specification) for complete details. Fortunately, as the two specifications have evolved, MIPI has migrated many of the advanced features into the I3C Basic Specification---attracting more developers and expanding the reach of MIPI I3C into a wider range of embedded and mainstream computer applications.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>Many current platforms rely on I2C (Inter Integrated Circuit) and SPI (Serial Peripheral Interconnect) for connecting sensors and other low-medium speed devices to a processor. MIPI I3C addresses long-standing limitations of both of these protocols and provides a path towards consolidating legacy interfaces into a single connection type that leverages positive features of I2C/SPI while adding new capabilities that are important as more diverse device types are supported. At the same time, MIPI I3C SDR is an enhanced version of I2C and backward compatibility is a requirement.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>Another feature that should promote I3C acceptance is the MIPI I3C Host Controller Interface (HCI) Specification. This specification standardizes host interactions with I3C devices using two operational modes: DMA and PIO. HCI DMA mode is important in larger systems that have the memory resources to support host controller models similar to those used by USB xHCI and NVMe to off-load the CPU from much of the burden of managing device transactions. On the other hand, an I3C host controller operating in PIO mode may be better suited to an embedded system where logic, memory, and power resources are more scarce and a microcontroller may be responsible for managing the I3C controller and all of its attached devices.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cstrong>\u003Cspan style=\"color: rgb(186, 55, 42);\">All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/span>\u003C/strong>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"I3C\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>Major features defined in the MIPI I3C Basic Specification\u003C/li>\r\n\u003Cli>How MIPI I3C addresses some of the long-standing speed, power, and pin count limitations of alternative IC communication protocols, including I2C and SPI\u003C/li>\r\n\u003Cli>Why I3C devices dynamically switch data drivers between push-pull and open drain signaling\u003C/li>\r\n\u003Cli>The motivations for MIPI I3C Hot-Join in power sensitive applications\u003C/li>\r\n\u003Cli>How I3C compliant devices report bus and internal characteristics to software\u003C/li>\r\n\u003Cli>How an enhanced set of direct and broadcast Common Command Code (CCC) transactions help simplify initialization, changing bus modes, and with device control and status operations\u003C/li>\r\n\u003Cli>The use of I3C in-band interrupts (IBI) to reduce pin count and enable devices to send critical status information as part of the IBI payload.\u003C/li>\r\n\u003Cli>Key features of the MIPI I3C Host Controller Interface (HCI) Specification\u003C/li>\r\n\u003C/ul>","\u003Cp>Some background in serial bus protocols such as I2C and SPI is helpful but not required.\u003C/p>","\u003Cul>\r\n                \u003Cli>Key Specifications\r\n                \u003Cul>\r\n                    \u003Cli>MIPI I3C Specification and the MIPI I3C Basic Specification\u003C/li>\r\n                    \u003Cli>MIPI I3C Host Controller Interface (HCI) Specification\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>I3C Background & Overview of Key Features\r\n                \u003Cul>\r\n                    \u003Cli>Limitations of I2C/SPI protocols and I2C features carried forward into I3C\u003C/li>\r\n                    \u003Cli>I3C bus topology: controllers, targets, routers, bridges\u003C/li>\r\n                    \u003Cli>Default two-wire half-duplex signal interface and the multi-lane data option\u003C/li>\r\n                    \u003Cli>Dynamic switching between open-drain and push-pull data signaling\u003C/li>\r\n                    \u003Cli>Interleaved protocols: I3C Single Data Rate (SDR), High Data Rates (HDR), legacy I2C\u003C/li>\r\n                    \u003Cli>Standardized configuration model\u003C/li>\r\n                    \u003Cli>Static, dynamic, and group addresses\u003C/li>\r\n                    \u003Cli>Private read/write and Common Command Code (CCC) transactions\u003C/li>\r\n                    \u003Cli>Improved bus error detection, reporting, and recovery\u003C/li>\r\n                    \u003Cli>In-band Interrupts (IBIs) replace external interrupts\u003C/li>\r\n                    \u003Cli>Hot-join capability enables devices to be added after bus configuration\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Device Capability Discovery\r\n                \u003Cul>\r\n                    \u003Cli>Required and optional feature support\u003C/li>\r\n                    \u003Cli>I3C characteristics registers and I2C Legacy Virtual Register (LVR)\u003C/li>\r\n                    \u003Cli>Accessing device capabilities and advanced capabilities\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Bus Communications Basics\r\n                \u003Cul>\r\n                    \u003Cli>Private read/writes and Common Command Code (CCC) messages\u003C/li>\r\n                    \u003Cli>Introduction to default SDR protocol: controller and target roles\u003C/li>\r\n                    \u003Cli>Inactive bus conditions: idle, available, free\u003C/li>\r\n                    \u003Cli>Motivations for dynamic switching between open drain and push-pull signaling\u003C/li>\r\n                    \u003Cli>I3C broadcast address and arbitration events\u003C/li>\r\n                    \u003Cli>Bus Activity states for power conservation\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>I3C Single Data Rate (SDR) Message Details\r\n                \u003Cul>\r\n                    \u003Cli>Private read/write transfer examples\u003C/li>\r\n                    \u003Cli>Direct and broadcast CCC message examples\u003C/li>\r\n                    \u003Cli>Managing maximum read length (MRL) and maximum write length (MWL)\u003C/li>\r\n                    \u003Cli>Programming and using group addresses\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Bus Initialization and Dynamic Address Assignment (DAA)\r\n                \u003Cul>\r\n                    \u003Cli>Motivations for DAA; reducing conflicts, IBI priority, hot-join support\u003C/li>\r\n                    \u003Cli>After reset/power-up: static addresses and PIDs\u003C/li>\r\n                    \u003Cli>Key CCC messages used for DAA\u003C/li>\r\n                    \u003Cli>Hot-join and DAA\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Hot-Join Mechanism\r\n                \u003Cul>\r\n                    \u003Cli>Motivations\u003C/li>\r\n                    \u003Cli>In-band reset vs. sideband wake events\u003C/li>\r\n                    \u003Cli>Hot-join arbitration and request sequence\u003C/li>\r\n                    \u003Cli>Dynamic address assignment for newly discovered devices\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>In-band interrupts (IBI)\r\n                \u003Cul>\r\n                    \u003Cli>Reporting IBI capabilities\u003C/li>\r\n                    \u003Cli>Dynamic address and IBI priority\u003C/li>\r\n                    \u003Cli>IBI arbitration sequence & controller acceptance/deferral\u003C/li>\r\n                    \u003Cli>Mandatory data byte (MDB) and payload options\u003C/li>\r\n                    \u003Cli>Enabling and disabling target interrupts\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Secondary Controllers\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Primary and secondary controller roles\u003C/li>\r\n                    \u003Cli>Checking for secondary controller capabilities\u003C/li>\r\n                    \u003Cli>Secondary controller request\u003C/li>\r\n                    \u003Cli>Primary to secondary controller handoff sequence\u003C/li>\r\n                    \u003Cli>Controllers passing target address and capability information using CCCs\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>HDR-DDR Protocol\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Target reporting of HDR-DDR support\u003C/li>\r\n                    \u003Cli>HDR vs. SDR clocking\u003C/li>\r\n                    \u003Cli>Transition from SDR mode into HDR-DDR mode\u003C/li>\r\n                    \u003Cli>Word-based HDR-DDR commands, data, CRC\u003C/li>\r\n                    \u003Cli>Preamble and parity bits\u003C/li>\r\n                    \u003Cli>HDR Restart and Exit patterns\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>HDR-BT Protocol\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Motivations and advantages of I3C HDR-BT protocol\u003C/li>\r\n                    \u003Cli>HDR-BT mode entry and exit\u003C/li>\r\n                    \u003Cli>Block-based messages\u003C/li>\r\n                    \u003Cli>CRC-16 vs. CRC-32\u003C/li>\r\n                    \u003Cli>Transaction examples\u003C/li>\r\n                    \u003Cli>Managing payload size (maximum read/write length)\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Multi-Lane Data Transfers\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Discovering capabilities and configuring dual-lane, quad-lane transfers\u003C/li>\r\n                    \u003Cli>Maintaining interoperability with single-lane devices\u003C/li>\r\n                    \u003Cli>Multi-lane SDA striping and DDR clocking\u003C/li>\r\n                    \u003Cli>Frame coding\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>MIPI I3C Host Controller Overview\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Motivations and goals for MIPI I3C HCI (Host Controller Interface)\u003C/li>\r\n                    \u003Cli>Host connection: PCIe bus vs. others\u003C/li>\r\n                    \u003Cli>PCI Registers and MMIO Capability, DAT/DCT register sets\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>HCI PIO Mode Operations\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>PIO mode registers and internal queues/ports\u003C/li>\r\n                    \u003Cli>Command types and descriptor formats\u003C/li>\r\n                    \u003Cli>Managing queue thresholds\u003C/li>\r\n                    \u003Cli>PIO mode masking of interrupt status and interrupt delivery\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>HCI DMA Mode Operations\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Memory ring bundles\u003C/li>\r\n                    \u003Cli>MMIO ring headers\u003C/li>\r\n                    \u003Cli>Command ring transfer descriptors and response ring descriptors\u003C/li>\r\n                    \u003Cli>Ring enqueue and dequeue pointers\u003C/li>\r\n                    \u003Cli>Data buffers: standard and scatter-gather pointers\u003C/li>\r\n                    \u003Cli>DMA mode I3C bus transfer example\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n            \u003C/ul>","2022-06-14T09:40:11.000000Z",10,"public/live_training_courses/thumbnails/live_training_course_726_thumbnail_1747668397.png","mipi-i3c",98,"\u003Cul>\r\n\u003Cli>PDF of course slides\u003C/li>\r\n\u003Cli>Optional add-on: \u003Ca href=\"../../elearning-course/i3c-architecture-elearning-course\">I3C eLearning\u003C/a> (discounted pricing applies)\u003C/li>\r\n\u003C/ul>",{"id":18,"title":28,"created_at":29,"updated_at":30,"order":19},[488],{"id":489,"name":490,"about":491,"instructor_fullname":374,"instructor_email":409,"price":220,"price_arbor":220,"created_at":39,"updated_at":492,"you_will_learn":493,"equivelent_of":86,"subscription_length":43,"video_id":494,"is_active":12,"prerequisites":164,"modified_at":495,"order":146,"presentation_id":496,"slug":497,"course_category_id":498,"release_date":51,"old_product_id":499,"meta_description":500,"meta_keywords":501,"author_signature":383,"description":502,"meta_title":490,"whats_included":503,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":504},1759,"I3C Architecture eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"I3C\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","2025-12-08T21:34:22.000000Z","\u003Cdiv>\r\n\u003Cul>\r\n\u003Cli>Major features defined in the MIPI I3C Basic Specification\u003C/li>\r\n\u003Cli>How MIPI I3C addresses some of the long-standing speed, power, and pin count limitations of alternative IC communication protocols, including I2C and SPI\u003C/li>\r\n\u003Cli>Why I3C devices dynamically switch data drivers between push-pull and open drain signaling\u003C/li>\r\n\u003Cli>The motivations for MIPI I3C Hot-Join in power sensitive applications\u003C/li>\r\n\u003Cli>How I3C compliant devices report bus and internal characteristics to software\u003C/li>\r\n\u003Cli>How an enhanced set of direct and broadcast Common Command Code (CCC) transactions help simplify initialization, changing bus modes, and with device control and status operations\u003C/li>\r\n\u003Cli>The use of I3C in-band interrupts (IBI) to reduce pin count and enable devices to send critical status information as part of the IBI payload.\u003C/li>\r\n\u003Cli>Key features of the MIPI I3C Host Controller Interface (HCI) Specification\u003C/li>\r\n\u003C/ul>\r\n\u003C/div>",37765,"2025-01-02 17:08:27",506,"i3c-architecture-elearning-course",22,835,"I3C architecture eLearning","i3c, elearning, online training, tutorial","\u003Cp>This MindShare course is designed for hardware/software engineers and others needing detailed coverage of MIPI I3C protocol. \u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/i3c_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/i3c_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>I3C eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":473,"elearning_course_id":489},[506,525],{"id":507,"name":508,"description":509,"about":510,"you_will_learn":511,"prerequisites":512,"is_active":12,"modified_at":13,"course_outline":513,"created_at":514,"updated_at":515,"duration":516,"category_id":89,"order":89,"thumbnail":517,"slug":518,"old_live_courses_id":13,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":519,"category":520,"elearning_courses":524},746,"HBM - High Bandwidth Memory","\u003Cp>High Bandwidth Memory (HBM) is a form of DRAM used on the most capable HPC and SoC platforms. HBM is an evolution of WideIO and WideIO2 with some concepts borrowed from Graphics DRAM. HBM provides the maximum possible bandwidth of any DRAM technology, largely by implementing several very wide channels. All DRAM (PC DRAM, LP DRAM, Graphics DRAM, HBM) are very similar to one another, but there are significant differences in HBM that this course covers in detail up to and including HBM4E.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"HBM\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>DRAM architecture fundamentals if you book a 4-Day class\u003C/li>\r\n\u003Cli>Where JEDEC expects HBM to be placed in a system\u003C/li>\r\n\u003Cli>Organization and operation of HBM devices\u003C/li>\r\n\u003Cli>Electrical characteristics of HBM and why HBM lacks many SI tools found in other technologies\u003C/li>\r\n\u003Cli>Differences between WideIO, WideIO2, HBM1, HBM2, HBM2E, HBM3, HBM3E, HBM4 and HBM4E\u003C/li>\r\n\u003Cli class=\"MsoNormal\">HBM3/HBM3E/HBM4/HBM4E bank state machine, commands and waveforms\u003C/li>\r\n\u003Cli class=\"MsoNormal\">Overview of IEEE 1500\u003C/li>\r\n\u003Cli class=\"MsoNormal\">Calibration and training of HBM channels\u003C/li>\r\n\u003Cli class=\"MsoNormal\">HBM power management\u003C/li>\r\n\u003Cli class=\"MsoNormal\">HBM error handling\u003C/li>\r\n\u003C/ul>","\u003Cp>Completion of MindShare’s Fundamentals of DRAM course or equivalent industry experience for a 3 Day class, otherwise for 4 Day class, digital design and computer architecture background.\u003C/p>","\u003Cp>\u003Cspan style=\"text-decoration: underline;\">\u003Cstrong>DRAM Fundamentals (1 Day) - Day 1 can be skipped with DRAM fundamentals prerequisite knowledge\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cul>\r\n\u003Cli>System Architecture and Intro to DRAM\u003C/li>\r\n\u003Cli>DRAM Device Architecture\u003C/li>\r\n\u003Cli>Packaging and HBM\u003C/li>\r\n\u003Cli>DRAM Controller Basics and Addresses\u003C/li>\r\n\u003Cli>DDR4 Device and Pin Descriptions\u003C/li>\r\n\u003Cli>Signal Routing\u003C/li>\r\n\u003Cli>DDR4 - Bank State Machines, Commands and Waveforms\u003C/li>\r\n\u003Cli>Refresh\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"text-decoration: underline;\">\u003Cstrong>HBM Topics (3 Days)\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cul>\r\n\u003Cli>System Architecture and Packaging\r\n\u003Cul>\r\n\u003Cli>Example Platforms\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Channel Architecture, Device Organization and Device Architecture\r\n\u003Cul>\r\n\u003Cli>Features and Architectures of Previous Technologies (PC and LP DRAMs)\u003C/li>\r\n\u003Cli>HBM Channels and Pseudo channels\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Signal Descriptions\r\n\u003Cul>\r\n\u003Cli>Channel Signals\u003C/li>\r\n\u003Cli>Global Signals\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Bank State Machines, Commands and Waveforms\r\n\u003Cul>\r\n\u003Cli>Simultaneous Row and Column Commands\u003C/li>\r\n\u003Cli>Use of WDQS and RDQS\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Refresh\r\n\u003Cul>\r\n\u003Cli>Auto Refresh\u003C/li>\r\n\u003Cli>Self Refresh\u003C/li>\r\n\u003Cli>Single-bank (Per-bank) Refresh\u003C/li>\r\n\u003Cli>Row Hammer, Target Row Refresh and Refresh Management\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Electrical Specifications\r\n\u003Cul>\r\n\u003Cli>Why so many traditional SI tools (ODT, ZQ cal, etc.) are not present\u003C/li>\r\n\u003Cli>IDD Specification\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Power Management\r\n\u003Cul>\r\n\u003Cli>Power Down\u003C/li>\r\n\u003Cli>Clock Throttling\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Initialization, Calibration, and Training\r\n\u003Cul>\r\n\u003Cli>JEDEC Initialization\r\n\u003Cul>\r\n\u003Cli>Mode Registers\u003C/li>\r\n\u003Cli>Initialization Steps\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Calibration and Training\r\n\u003Cul>\r\n\u003Cli>Vref Training\u003C/li>\r\n\u003Cli>Loopback LFSR MISR Training\r\n\u003Cul>\r\n\u003Cli>Command Bus (AWORD) Training\u003C/li>\r\n\u003Cli>Data Group (DWORD) Training\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Duty Cycle Adjustment (DCA) and Duty Cycle Monitoring (DCM)\u003C/li>\r\n\u003Cli>WDQS Interval Oscillator\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Errors and Error Handling\r\n\u003Cul>\r\n\u003Cli>Temperature\u003C/li>\r\n\u003Cli>Address Parity\u003C/li>\r\n\u003Cli>Data Parity\u003C/li>\r\n\u003Cli>Lane Remapping\u003C/li>\r\n\u003Cli>Sideband ECC\u003C/li>\r\n\u003Cli>On-Die ECC\u003C/li>\r\n\u003Cli>Post Package Repair\r\n\u003Cul>\r\n\u003Cli>Self-Repair\u003C/li>\r\n\u003Cli>Hard and Soft Repair\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Overview of IEEE 1500\u003C/li>\r\n\u003C/ul>","2025-01-30T22:37:55.000000Z","2026-01-06T08:34:13.000000Z","3 - 4 days","public/live_training_courses/thumbnails/live_training_course_746_thumbnail_1755651111.png","hbm","\u003Cul>\r\n\u003Cli>PDF of course slides\u003C/li>\r\n\u003Cli>HBM Architecture eLearning (when available)\u003C/li>\r\n\u003C/ul>",{"id":89,"title":521,"created_at":522,"updated_at":523,"order":42},"Memory Technology","2024-01-15T09:26:41.000000Z","2025-05-12T18:24:14.000000Z",[],{"id":526,"name":527,"description":528,"about":529,"you_will_learn":530,"prerequisites":531,"is_active":12,"modified_at":13,"course_outline":532,"created_at":533,"updated_at":534,"duration":326,"category_id":89,"order":47,"thumbnail":535,"slug":536,"old_live_courses_id":537,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":538,"meta_keywords":539,"meta_description":540,"training_materials":541,"category":542,"elearning_courses":543},725,"DRAM (DDR5/LPDDR6) Architecture","\u003Cp class=\"MsoNormal\" style=\"margin-bottom: 0in; line-height: normal; mso-hyphenate: none;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Whether you are new to DRAM or an industry veteran seeking the latest and greatest standards, you will learn more than you expect from MindShare's DRAM courses. You may be well-versed on modern serial protocols but learning parallel-bus protocols of DDR DRAM will be valuable. You might have worked extensively with mainstream PC DRAMs and now you need to learn low-power LP DRAM designs. This DRAM course will help you design, develop, validate, verify, test, debug or support DRAM interfaces.\u003C/span>\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42); font-size: 10pt;\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"DRAM Architecture\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul style=\"margin-top: 0in;\" type=\"disc\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Where JEDEC expects DRAM to appear in a system\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">How a DRAM cell is addressed by the controller\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Difference between Banks, Bank Groups and Ranks\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Why the DRAM controller is so complicated\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Activation, Precharge and Refresh including newer forms\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR4 as fundamental technology\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Types of DIMMs\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Fly-By Routing\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR5, LPDDR5 and LPDDR6 pin definitions, bank state diagrams and timing waveforms\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR5 DIMM PMIC\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Dynamic Voltage and Frequency Scaling (DVFS), Frequency Set Points (FSP) and clock throttling\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">On-Die Termination (ODT)\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">JEDEC Initialization and Mode Registers\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Calibration and training\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Sources of errors and JEDEC features for handling errors\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Test philosophy and JEDEC features to assist with testing\u003C/span>\u003C/li>\r\n\u003C/ul>","\u003Cp>\u003Cspan style=\"font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"line-height: 115%;\">A basic understanding of \u003C/span>\u003Cspan style=\"line-height: 115%; color: rgb(48, 51, 48); letter-spacing: 0.2pt;\">digital design and some computer architecture background\u003C/span>\u003Cspan style=\"line-height: 115%;\">.\u003C/span>\u003C/span>\u003C/p>","\u003Cul style=\"margin-top: 0in;\" type=\"disc\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">System Architecture \u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">PC Platform Architecture\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">NUMA Architecture\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">SoC Architecture\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Back to the Future DRAM Intro \u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">It's more similar than it is different\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DRAM Cell Architecture\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Problems of Activation, Precharge and Refresh\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DRAM Device Architecture \u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">SDRAM through DDR5 and LPDDR6\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Bank Groups\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">LPDDR5 Bank Group options\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Packaging\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Monolithic\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Stacked Die\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">3DS, Hybrid Memory Cube, High Bandwidth Memory (HBM)\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Package-on-Package\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Dual LPDDR4 Channels\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DRAM Controller Basics\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Functional Blocks\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Address Translation/Address Mapping Examples\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Device and Dual In-line Memory Module (DIMM) Pin Descriptions\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR4\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DIMM\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Introduction to DIMM Architecture\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">UDIMM\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">RDIMM\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">LRDIMM\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Fly-by Routing\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Bank State Machines, Commands, Waveforms\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR4\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Refresh\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Auto Refresh\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Self Refresh\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Auto Self Refresh\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Rowhammer Mitigations\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Target Row Refresh\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Refresh Management\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Per-Row Activation Count\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Device and DIMM Pin Descriptions\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR5\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DIMM\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">LPDDR5\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">LPDDR6\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR4 and DDR5 DIMM Architecture\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">UDIMM\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">RDIMM\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">LRDIMM\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">PMIC\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR4 On-DIMM Address Mirroring\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR5 Mirroring\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Bank State Machines, Commands, Waveforms\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR5\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">LPDDR5 and LPDDR6\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Newer Forms of Refresh\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Per-Bank and Fine Granularity Refresh\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Temperature Compensated Refresh\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Self-Refresh Abort, Fast Exit\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Electrical Specifications \u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR4/DDR5 POD\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">LPDDR5/LPDDR6 LVSTL\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">IDD Specifications, Example\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-family: helvetica, arial, sans-serif; font-size: 10pt;\">Power Management\u003C/span>\u003C/li>\r\n\u003Cli style=\"list-style-type: none; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Power Down and Self Refresh\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR4/DDR5 Max Power Saving Mode\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">LPDDR5/LPDDR6 Frequency Setpoints (FSP)\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">LPDDR5/LPDDR6 Dynamic Voltage and Frequency Scaling\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"square\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DVFSC, DVFSH, DVFSL, DVFSB, DVFSQ\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Introduction to Signal Integrity Issues\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Sources and Solutions\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">On-Die Termination\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Sync/Async ODT\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR4/DDR5/LPDDR6 Dynamic ODT\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Data Group ODT and Command Bus ODT\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR4/DDR5/LP DRAM Park Mode\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Command Bus ODT\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Initialization, Calibration and Training\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">JEDEC Initialization\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"square\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR4 Mode Registers\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR4 Initialization\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR5, LPDDR5, LPDDR6 Initialization\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Calibration and Training \u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"square\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">ZQ Calibration\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Vref Training\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">CS Training Mode\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">CA Command Bus Training\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Write Leveling\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Read Calibration\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Write Calibration\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"square\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Duty Cycle Adjustment, Duty Cycle Monitor, DFE, FIFO, DQS Oscillator\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Errors and Error Handling \u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Sources of Errors\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DIMM ECC\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">On-Die ECC\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DIMM Parity\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR4 CA Parity\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR4 Write CRC\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR5 Read/Write CRC\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">LPDDR5/LPDDR6 Link ECC/EDC\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">LPDDR6 In-line ECC with System Metadata Carve Out\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Post Package Repair\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Testing\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DRAM Functional Tests\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Structural Test Example\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Cell Test Example\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DRAM Parametric (pin) Tests\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR4 Connectivity Test Mode\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">DDR5 Loopback Mode\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">LPDDR6 Loopback Mode\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">Optional Topics\u003C/span>\r\n\u003Cul style=\"margin-top: 0in;\" type=\"circle\">\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">SMBus Overview, I3C\u003C/span>\u003C/li>\r\n\u003Cli class=\"MsoNormal\" style=\"color: black; margin-top: 0.1pt; margin-bottom: 0.1pt; line-height: normal; font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-size: 10pt; font-family: helvetica, arial, sans-serif;\">NVM Transaction Overview\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>","2023-02-09T11:28:10.000000Z","2026-08-27T16:02:38.000000Z","public/live_training_courses/thumbnails/live_training_course_725_thumbnail_1747668679.png","dram-ddr5lpddr5-architecture",97,"DRAM Architecture","DDR, DDR5, LPDDR5, LPDDR6 DRAM Architecture, DRAM Training","DDR, DDR5, LPDDR5, LPDDR6 DRAM Architecture","\u003Cul>\r\n\u003Cli style=\"font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-family: helvetica, arial, sans-serif; font-size: 10pt;\">PDF of course slides\u003C/span>\u003C/li>\r\n\u003Cli style=\"font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Cspan style=\"font-family: helvetica, arial, sans-serif; font-size: 10pt;\">\u003Ca href=\"../../elearning-course/modern-dram-ddr5-ddr4-lpddr5-lpddr4-elearning-course\">Modern DRAM eLearning Course\u003C/a>\u003C/span>\u003C/li>\r\n\u003C/ul>",{"id":89,"title":521,"created_at":522,"updated_at":523,"order":42},[544,546,565],{"id":489,"name":490,"about":491,"instructor_fullname":374,"instructor_email":409,"price":220,"price_arbor":220,"created_at":39,"updated_at":492,"you_will_learn":493,"equivelent_of":86,"subscription_length":43,"video_id":494,"is_active":12,"prerequisites":164,"modified_at":495,"order":146,"presentation_id":496,"slug":497,"course_category_id":498,"release_date":51,"old_product_id":499,"meta_description":500,"meta_keywords":501,"author_signature":383,"description":502,"meta_title":490,"whats_included":503,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":545},{"live_training_course_id":526,"elearning_course_id":489},{"id":547,"name":548,"about":549,"instructor_fullname":550,"instructor_email":551,"price":160,"price_arbor":160,"created_at":39,"updated_at":492,"you_will_learn":552,"equivelent_of":89,"subscription_length":43,"video_id":553,"is_active":12,"prerequisites":164,"modified_at":554,"order":42,"presentation_id":555,"slug":556,"course_category_id":498,"release_date":557,"old_product_id":558,"meta_description":559,"meta_keywords":560,"author_signature":561,"description":562,"meta_title":559,"whats_included":563,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":564},1757,"Modern DRAM (DDR5 / DDR4 / LPDDR5 / LPDDR4) eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"DRAM\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","John Swindle","john.swindle@mindshare.com","\u003Cdiv>\r\n\u003Cul>\r\n\u003Cli>Where JEDEC expects DRAM to appear in a system\u003C/li>\r\n\u003Cli>How a DRAM cell is addressed by the controller\u003C/li>\r\n\u003Cli>Difference between Banks, Bank Groups and Ranks\u003C/li>\r\n\u003Cli>Why the DRAM controller is so complicated\u003C/li>\r\n\u003Cli>Activation, Precharge and Refresh\u003C/li>\r\n\u003Cli>DDR4 pin definitions\u003C/li>\r\n\u003Cli>DDR4 bank state diagram\u003C/li>\r\n\u003Cli>DDR4 timing waveforms\u003C/li>\r\n\u003Cli>Prefetch Width\u003C/li>\r\n\u003Cli>Types of DIMMs\u003C/li>\r\n\u003Cli>Fly-By Routing\u003C/li>\r\n\u003Cli>PC and LP DRAM device architectures and features including DDR5 and LPDDR5\u003C/li>\r\n\u003Cli>DDR5/LPDDR4/LPDDR5 pin definitions\u003C/li>\r\n\u003Cli>DDR5/LPDDR4/LPDDR5 bank state diagrams\u003C/li>\r\n\u003Cli>DDR5/LPDDR4/LPDDR5 timing waveforms\u003C/li>\r\n\u003Cli>DDR5 DIMM PMIC\u003C/li>\r\n\u003Cli>Intro to NVDIMM\u003C/li>\r\n\u003Cli>Newer forms of Refresh\u003C/li>\r\n\u003Cli>POD and LVSTL signaling\u003C/li>\r\n\u003Cli>Clock throttling and dynamic voltage changes\u003C/li>\r\n\u003Cli>On-Die Termination (ODT)\u003C/li>\r\n\u003Cli>JEDEC Initialization and Mode Registers\u003C/li>\r\n\u003Cli>Calibration and training, including\r\n\u003Cul>\r\n\u003Cli>Vref training\u003C/li>\r\n\u003Cli>Read and Write calibration\u003C/li>\r\n\u003Cli>Write Leveling\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Sources of errors and JEDEC features for handling errors\u003C/li>\r\n\u003Cli>Test philosophy and JEDEC features to assist with testing\u003C/li>\r\n\u003C/ul>\r\n\u003C/div>",37763,"2025-02-17 15:43:28",504,"modern-dram-ddr5-ddr4-lpddr5-lpddr4-elearning-course","2022-09-03 05:00:00",829,"DRAM eLearning Course","dram, ddr5, lpddr5, ddr4, lpddr4, online training, tutorial","John-Swindle","\u003Cp>This course is hardware-centric and also describes initialization and training of DRAM devices and controllers. It is suitable for hardware engineers and software/firmware engineers will also benefit. The course is ideal for DRAM controller designers, chipset designers, system board-level design and validation engineers. This course introduces current DRAM technologies, concentrating on DDR4 as a baseline to teach concepts that are common to all DRAMs. The course then continues to cover in detail all new features of DDR5, DDR4, LPDDR5, and LPDDR4.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/ddr5_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/ddr5_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>DRAM eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":526,"elearning_course_id":547},{"id":566,"name":567,"about":549,"instructor_fullname":550,"instructor_email":551,"price":220,"price_arbor":220,"created_at":39,"updated_at":568,"you_will_learn":569,"equivelent_of":42,"subscription_length":43,"video_id":570,"is_active":12,"prerequisites":45,"modified_at":571,"order":86,"presentation_id":572,"slug":573,"course_category_id":498,"release_date":129,"old_product_id":574,"meta_description":575,"meta_keywords":576,"author_signature":561,"description":577,"meta_title":567,"whats_included":578,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":579},1760,"Fundamentals of DRAM eLearning Course","2026-02-02T20:43:06.000000Z","\u003Cdiv>\r\n\u003Cul>\r\n\u003Cli>Where JEDEC expects DRAM to appear in a system\u003C/li>\r\n\u003Cli>How a DRAM cell is addressed by the controller\u003C/li>\r\n\u003Cli>Difference between Banks, Bank Groups and Ranks\u003C/li>\r\n\u003Cli>Why the DRAM controller is so complicated\u003C/li>\r\n\u003Cli>Activation, Precharge and Refresh\u003C/li>\r\n\u003Cli>DDR4 pin definitions\u003C/li>\r\n\u003Cli>DDR4 bank state diagram\u003C/li>\r\n\u003Cli>DDR4 timing waveforms\u003C/li>\r\n\u003Cli>Prefetch Width\u003C/li>\r\n\u003Cli>Types of DIMMS\u003C/li>\r\n\u003Cli>Fly-By Routing\u003C/li>\r\n\u003Cli>PC and LP DRAM device architectures and features including DDR5 and LPDDR5\u003C/li>\r\n\u003C/ul>\r\n\u003C/div>",37766,"2025-08-11 21:03:00",508,"fundamentals-of-dram",845,"fundamentals of dram","dram, ddr5, ddr4, tutorial, elearning","\u003Cp>\u003Cstrong>Note: This course is a subset of the comprehensive course entitled: Modern DRAM (DDR5 / DDR4 / LPDDR5 / LPDDR4) eLearning Course\u003C/strong>.\u003C/p>\r\n\u003Cp>If you purchase this fundamentals course and then want to upgrade to the comprehensive course, you will only have to pay the difference for the upgrade.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/fund_dram_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/fund_dram_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>DRAM eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":526,"elearning_course_id":566},[581,629,648],{"id":582,"name":583,"description":584,"about":585,"you_will_learn":586,"prerequisites":587,"is_active":12,"modified_at":13,"course_outline":588,"created_at":589,"updated_at":590,"duration":326,"category_id":591,"order":481,"thumbnail":592,"slug":593,"old_live_courses_id":594,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":280,"category":595,"elearning_courses":598},710,"PC Virtualization","\u003Cp>Virtualization is one of the fascinating and complex areas in the PC industry, generating significant revenue, and solving critical problems in the PC data center. Virtualization technology is used across a wide range of platforms, from embedded to data center. This class is to explain what virtualization is, and what IT problems it solves, and also the problems that it does not solve. You will learn how Intel virtualization is implemented, along with the overhead and performance issues with the implementations.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"PC Virtualization\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>What virtualization is, and the revenue generating uses for virtualization.\u003C/li>\r\n\u003Cli>The theory of virtualization, dating back to the IBM mainframes of the 60s and 70s, and how that mainframe technology is relevant to PC virtualization today.\u003C/li>\r\n\u003Cli>How Intel has enhanced their processors to help implement classical virtualization.\u003C/li>\r\n\u003Cli>How memory and I/O virtualization is achieved today.\u003C/li>\r\n\u003Cli>The major sources of overhead with the virtualization techniques.\u003C/li>\r\n\u003C/ul>","\u003Cp>A solid background in PC architecture will assist the students in understanding the material. We cannot understand how to virtualize a particular function unless we understand that function! Each section will include a brief review of the appropriate PC architecture to help fill in any holes in the students' background knowledge, but this class is not intended to be a complete PC architecture class.\u003C/p>","\u003Cul>\r\n                \u003Cli>Introduction to virtualization, its history and uses\r\n                \u003Cul>\r\n                    \u003Cli>Explanation of what virtualization is, with a demonstration (VMWare workstation)\u003C/li>\r\n                    \u003Cli>Explores how virtualization can be used\u003C/li>\r\n                    \u003Cli>Looks at revenue generating uses\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Virtualization theory classical trap and emulate\u003C/li>\r\n                \u003Cli>Implementation of software virtualization techniques\r\n                \u003Cul>\r\n                    \u003Cli>Paravirtualization. How paravirtualization is implemented, the advantages of it, and why it continues in importance moving forwards\u003C/li>\r\n                    \u003Cli>Ring aliasing. How the processor hardware is setup to assist software virtualization\u003C/li>\r\n                    \u003Cli>Binary translation. Implementation details, and comparison with binary translation.\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Issues with x86 processor virtualization\r\n                \u003Cul>\r\n                    \u003Cli>Exploration of issues with the x86 instruction set and x86 architecture that make the software techniques complex\u003C/li>\r\n                    \u003Cli>A background to the processor enhancements by Intel\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Details of Intel VT hardware virtualization assists (codename Vanderpool) – VMCS / VMX\r\n                \u003Cul>\r\n                    \u003Cli>Instructions and operating modes (root and non-root)\u003C/li>\r\n                    \u003Cli>Processor data structures (VMCS)\u003C/li>\r\n                    \u003Cli>MSRs\u003C/li>\r\n                    \u003Cli>Multi-processor, multi-core and virtualization\u003C/li>\r\n                    \u003Cli>Enhancements beyond the initial implementations, such as preemption timer\u003C/li>\r\n                    \u003Cli>Nested virtualization (VMCS shadowing)\u003C/li>\r\n                    \u003Cli>Virtualization Exception and the importance of its use\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Virtualization of interrupts and the APIC\r\n                \u003Cul>\r\n                    \u003Cli>How interrupts and exceptions are handled, and how this affects performance\u003C/li>\r\n                    \u003Cli>Delivery of interrupts to the hypervisor\u003C/li>\r\n                    \u003Cli>Hardware APIC virtualization, to deliver interrupts directly to guests, and even to non-running guests\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Memory handling to implement virtualization\r\n                \u003Cul>\r\n                    \u003Cli>Shadow page tables\u003C/li>\r\n                    \u003Cli>Intel hardware paging assists (Extended Page Tables)\u003C/li>\r\n                    \u003Cli>Paging optimizations and issues\u003C/li>\r\n                    \u003Cli>Memory and device virtualization\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Advantages and disadvantages of the hardware assists\r\n                \u003Cul>\r\n                    \u003Cli>Discussion of the Intel-VT performance issues\u003C/li>\r\n                    \u003Cli>Product demonstration to assist with the performance discussion (KVM)\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>I/O Virtualization\r\n                \u003Cul>\r\n                    \u003Cli>Software techniques, the advantages of them, and the issues\u003C/li>\r\n                    \u003Cli>Network virtualization\u003C/li>\r\n                    \u003Cli>The rational and problems with the hardware assists intended to assist with the software techniques\u003C/li>\r\n                    \u003Cli>PCI Express enhancements - ATS\u003C/li>\r\n                    \u003Cli>Intel's VT-d implementation of ATS\u003C/li>\r\n                    \u003Cli>Intel’s VT-d implementation of interrupt remapping\u003C/li>\r\n                    \u003Cli>SVN and PASID\u003C/li>\r\n                    \u003Cli>PCI Express single root virtualization\u003C/li>\r\n                    \u003Cli>PCI Express multi-root virtualization\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Virtualization products\r\n                \u003Cul>\r\n                    \u003Cli>Overview of some of the virtualization products in the marketplace, VMWare, Microsoft, KVM\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Other minor topics\r\n                \u003Cul>\r\n                    \u003Cli>Issues with time\u003C/li>\r\n                    \u003Cli>Security features related to virtualization, Intel TXT\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n            \u003C/ul>","2019-09-10T16:58:01.000000Z","2025-06-03T17:08:35.000000Z",12,"public/live_training_courses/thumbnails/live_training_course_710_thumbnail_1748359591.png","pc-virtualization",69,{"id":591,"title":596,"created_at":597,"updated_at":523,"order":146},"Virtualization Technology","2024-01-17T15:39:42.000000Z",[599,614],{"id":600,"name":601,"about":602,"instructor_fullname":139,"instructor_email":140,"price":83,"price_arbor":83,"created_at":39,"updated_at":603,"you_will_learn":586,"equivelent_of":89,"subscription_length":43,"video_id":604,"is_active":12,"prerequisites":45,"modified_at":13,"order":19,"presentation_id":605,"slug":606,"course_category_id":607,"release_date":129,"old_product_id":608,"meta_description":609,"meta_keywords":610,"author_signature":152,"description":611,"meta_title":601,"whats_included":612,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":613},1738,"PC Virtualization eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"PC Virtualization\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","2025-12-08T21:36:33.000000Z",37744,468,"pc-virtualization-elearning-course",17,676,"PC virtualization eLearning","intel, virtualization, vt-x, vt-d, io virtualization, online training","\u003Cp>Virtualization is one of the fascinating and complex areas in the PC industry, generating significant revenue, and solving critical problems in the PC data center. Virtualization technology is used across a wide range of platforms, from embedded to data center. This class is to explain what virtualization is, and what IT problems it solves, and also the problems that it does not solve. You will learn how Intel virtualization is implemented, along with the overhead and performance issues with the implementations.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/vt_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/vt_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PC Virtualization eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":582,"elearning_course_id":600},{"id":615,"name":616,"about":617,"instructor_fullname":102,"instructor_email":103,"price":83,"price_arbor":83,"created_at":39,"updated_at":603,"you_will_learn":618,"equivelent_of":207,"subscription_length":43,"video_id":619,"is_active":12,"prerequisites":164,"modified_at":620,"order":146,"presentation_id":621,"slug":622,"course_category_id":607,"release_date":51,"old_product_id":623,"meta_description":624,"meta_keywords":625,"author_signature":115,"description":626,"meta_title":616,"whats_included":627,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":628},1744,"IO Virtualization for Intel Platforms eLearning Course","\u003Cp>Let MindShare Bring \"IO Virtualization\" to Life for You\u003C/p>","\u003Cul>\r\n\u003Cli>What virtualization is, and the revenue generating uses for virtualization\u003C/li>\r\n\u003Cli>The major sources of overhead with software-only virtualization techniques\u003C/li>\r\n\u003Cli>How I/O virtualization will use the new hardware assists, to solve these problems\u003C/li>\r\n\u003Cli>Intel architecture focused VT-d (multiple generations)\u003C/li>\r\n\u003Cli>DMA remapping (Guest Physical to Host Physical as well as Shared Virtual Memory)\u003C/li>\r\n\u003Cli>PCIe Address Translation Services (ATS)\u003C/li>\r\n\u003Cli>PCIe Access Control Services (ACS)\u003C/li>\r\n\u003Cli>Single Root IOV (SRIOV)\u003C/li>\r\n\u003Cli>Shared Virtual Memory (SVM)\u003C/li>\r\n\u003Cli>Process Address Space IDs (PASIDs)\u003C/li>\r\n\u003Cli>Scalable IO Virtualization\u003C/li>\r\n\u003Cli>Posted Interrupts\u003C/li>\r\n\u003C/ul>",37750,"2025-08-06 14:27:13",484,"io-virtualization-for-intel-platforms-elearning-course",718,"IO Virtualization for Intel Platforms","Intel VT-d, virtualization, PCIe SRIOV","\u003Cp>Virtualization is one of the hot, exciting areas in the industry today, generating significant revenue, and solving critical problems in data centers and in embedded and mobile markets. However, software virtualization techniques add too much overhead to allow virtualization to be used for some applications. This class will look at those problem applications and the hardware solutions architected by Intel as well as support in standards like PCI Express (PCIe). The course focuses on the Intel processor SoC or Chipset VT-d elements that support DMA and Interrupt remapping. The course also discusses details of Address Translation Services (ATS), Access Control Services (ACS) and Single-Root IOV (SRIOV) implementations. This course has been updated to cover Intel's Scalabale IOV technology as well.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/iovintel_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/iovintel_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>IOV Intel eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":582,"elearning_course_id":615},{"id":630,"name":631,"description":632,"about":633,"you_will_learn":618,"prerequisites":634,"is_active":12,"modified_at":13,"course_outline":635,"created_at":636,"updated_at":637,"duration":326,"category_id":591,"order":638,"thumbnail":639,"slug":640,"old_live_courses_id":641,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":280,"category":642,"elearning_courses":643},709,"IO Virtualization on Intel Platforms","\u003Cp>Virtualization is one of the hot, exciting areas in the industry today, generating significant revenue, and solving critical problems in data centers and in embedded and mobile markets. However, software virtualization techniques add too much overhead to allow virtualization to be used for some applications. This class will look at those problem applications and the hardware solutions architected by Intel as well as support in standards like PCI Express (PCIe). The course focuses on the Intel processor SoC or Chipset VT-d elements that support DMA and Interrupt remapping. The course also discusses details of Address Translation Services (ATS), Access Control Services (ACS) and Single-Root IOV (SRIOV) implementations. This course has been updated to cover Intel's Scalabale IOV technology as well.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"IO Virtualization on Intel Platforms\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cp>PCI Express architecture background as well as general understanding of PC architecture are recommended.\u003C/p>","\u003Cul>\r\n                \u003Cli>Introduction to Virtualization\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>What is virtualization\u003C/li>\r\n                    \u003Cli>Why is it important\u003C/li>\r\n                    \u003Cli>Software Techniques\u003C/li>\r\n                    \u003Cli>Performance Issues\u003C/li>\r\n                    \u003Cli>PCI Pass-through (DirectPath I/O)\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>PCIe Address Translation Services (ATS)\r\n                \u003Cul>\r\n                    \u003Cli>What it is and how it helps\r\n                    \u003Cul>\r\n                        \u003Cli>Performance benefits\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>ATS Protocol\r\n                    \u003Cul>\r\n                        \u003Cli>Changes to PCIe packets\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Address Translation Caches (ATCs)\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>PCIe Access Control Services (ACS)\r\n                \u003Cul>\r\n                    \u003Cli>What it is and why it's needed\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>PCIe Single-Root IO Virtualization (SRIOV)\r\n                \u003Cul>\r\n                    \u003Cli>What it is and how it helps\u003C/li>\r\n                    \u003Cli>Functions vs. Physical Functions (PFs) vs. Virtual Functions (VFs)\u003C/li>\r\n                    \u003Cli>SRIOV Capability Structure (including VF BARs)\u003C/li>\r\n                    \u003Cli>Config space of VFs\u003C/li>\r\n                    \u003Cli>PCIe Alternative Routing ID (ARI)\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Intel VT-d: DMA Remapping\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>What it is and how it helps\u003Cbr>\r\n                    \u003Cul>\r\n                        \u003Cli>Performance benefits\u003C/li>\r\n                        \u003Cli>Security benefits\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Guest Virtual vs. Guest Physical vs. Host Physical Addresses\u003C/li>\r\n                    \u003Cli>Remap Engine Functionality\u003C/li>\r\n                    \u003Cli>Latency issues\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Shared Virtual Memory\r\n                \u003Cul>\r\n                    \u003Cli>What it is and how it helps\u003C/li>\r\n                    \u003Cli>PCIe Process Space IDs (PASIDs)\u003C/li>\r\n                    \u003Cli>Intel VT-d support of PASIDs\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Intel Scalable IO Virtualization\r\n                \u003Cul>\r\n                    \u003Cli>What it is and how it is different from SRIOV\u003C/li>\r\n                    \u003Cli>Hardware and software elements needed\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Intel VT-d: Interrupt Remapping\r\n                \u003Cul>\r\n                    \u003Cli>What it is and why it's needed\r\n                    \u003Cul>\r\n                        \u003Cli>Big security issue\u003C/li>\r\n                        \u003Cli>Virtualization performance improvements\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>MSI / MSI-X review (interrupt delivery)\r\n                    \u003Cul>\r\n                        \u003Cli>Compatibility Format vs. Remappable Format\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Direct Remapping (good)\u003C/li>\r\n                    \u003Cli>Posted Remapping (better)\r\n                    \u003Cul>\r\n                        \u003Cli>Virtual Local APICs\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n            \u003C/ul>","2019-09-10T16:57:06.000000Z","2026-01-21T21:17:07.000000Z",45,"public/live_training_courses/thumbnails/live_training_course_709_thumbnail_1748360115.png","io-virtualization-on-intel-platforms",68,{"id":591,"title":596,"created_at":597,"updated_at":523,"order":146},[644,646],{"id":615,"name":616,"about":617,"instructor_fullname":102,"instructor_email":103,"price":83,"price_arbor":83,"created_at":39,"updated_at":603,"you_will_learn":618,"equivelent_of":207,"subscription_length":43,"video_id":619,"is_active":12,"prerequisites":164,"modified_at":620,"order":146,"presentation_id":621,"slug":622,"course_category_id":607,"release_date":51,"old_product_id":623,"meta_description":624,"meta_keywords":625,"author_signature":115,"description":626,"meta_title":616,"whats_included":627,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":645},{"live_training_course_id":630,"elearning_course_id":615},{"id":600,"name":601,"about":602,"instructor_fullname":139,"instructor_email":140,"price":83,"price_arbor":83,"created_at":39,"updated_at":603,"you_will_learn":586,"equivelent_of":89,"subscription_length":43,"video_id":604,"is_active":12,"prerequisites":45,"modified_at":13,"order":19,"presentation_id":605,"slug":606,"course_category_id":607,"release_date":129,"old_product_id":608,"meta_description":609,"meta_keywords":610,"author_signature":152,"description":611,"meta_title":601,"whats_included":612,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":647},{"live_training_course_id":630,"elearning_course_id":600},{"id":649,"name":650,"description":651,"about":652,"you_will_learn":653,"prerequisites":654,"is_active":12,"modified_at":13,"course_outline":655,"created_at":656,"updated_at":657,"duration":326,"category_id":591,"order":658,"thumbnail":659,"slug":660,"old_live_courses_id":661,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":280,"category":662,"elearning_courses":663},716,"IO Virtualization on ARM Platforms","\u003Cp>Virtualization is one of the hot, exciting areas in the industry today, generating significant revenue, and solving critical problems in data centers and in embedded and mobile markets. However, software virtualization techniques add too much overhead to allow virtualization to be used for some applications. This class will look at those problem applications and the hardware solutions architected by ARM as well as support in standards like PCI Express (PCIe). The course focuses on ARM SoCs that have hardware support for DMA remapping (System MMU - SMMU) and virtual interrupts (GICv3 and GICv4). The course also discusses details of Address Translation Services (ATS), Access Control Services (ACS) and Single-Root IOV (SRIOV) implementations (though not multi-root IOV MRIOV).\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"IO Virtualization on ARM Platforms\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>What virtualization is, and the revenue generating uses for virtualization\u003C/li>\r\n\u003Cli>The major sources of overhead with software-only virtualization techniques\u003C/li>\r\n\u003Cli>How I/O virtualization will use the new hardware assists, to solve these problems\u003C/li>\r\n\u003Cli>ARM SMMU and ARM GICv3/v4\u003C/li>\r\n\u003Cli>DMA remapping (Intermediate Physical to Host Physical as well as Shared Virtual Memory)\u003C/li>\r\n\u003Cli>PCIe Address Translation Services (ATS)\u003C/li>\r\n\u003Cli>PCIe Access Control Services (ACS)\u003C/li>\r\n\u003Cli>Single-Root IOV (SRIOV)\u003C/li>\r\n\u003Cli>Process Address Space IDs (PASIDs)\u003C/li>\r\n\u003C/ul>","\u003Cp>PCI Express architecture background as well as general understanding of PC architecture is recommended.\u003C/p>","\u003Cul>\r\n                \u003Cli>Introduction to Virtualization\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>What is virtualization\u003C/li>\r\n                    \u003Cli>Why is it important\u003C/li>\r\n                    \u003Cli>Software Techniques\u003C/li>\r\n                    \u003Cli>Performance Issues\u003C/li>\r\n                    \u003Cli>PCI Pass-through (DirectPath I/O)\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>PCIe Address Translation Services (ATS)\r\n                \u003Cul>\r\n                    \u003Cli>What it is and how it helps\r\n                    \u003Cul>\r\n                        \u003Cli>Performance benefits\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>ATS Protocol\r\n                    \u003Cul>\r\n                        \u003Cli>Changes to PCIe packets\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Address Translation Caches (ATCs)\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>PCIe Access Control Services (ACS)\r\n                \u003Cul>\r\n                    \u003Cli>What it is and why it's needed\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>PCIe Single-Root IO Virtualization (SRIOV)\r\n                \u003Cul>\r\n                    \u003Cli>What it is and how it helps\u003C/li>\r\n                    \u003Cli>Functions vs. Physical Functions (PFs) vs. Virtual Functions (VFs)\u003C/li>\r\n                    \u003Cli>SRIOV Capability Structure (including VF BARs)\u003C/li>\r\n                    \u003Cli>Config space of VFs\u003C/li>\r\n                    \u003Cli>PCIe Alternative Routing ID (ARI)\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>ARM SMMU: DMA Remapping\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>What it is and how it helps\u003Cbr>\r\n                    \u003Cul>\r\n                        \u003Cli>Performance benefits\u003C/li>\r\n                        \u003Cli>Security benefits\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Virtual Address (VA) vs. Intermediate Physical Address (IPA) vs. Physical Addresses (PA)\u003C/li>\r\n                    \u003Cli>SMMU functionality and data structures\u003C/li>\r\n                    \u003Cli>Latency issues\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Shared Virtual Memory\r\n                \u003Cul>\r\n                    \u003Cli>What it is and how it helps\u003C/li>\r\n                    \u003Cli>PCIe Process Space IDs (PASIDs)\u003C/li>\r\n                    \u003Cli>ARM SMMU support of PASIDs\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>ARM GICv3 / v4: Interrupt Remapping\r\n                \u003Cul>\r\n                    \u003Cli>What it is and why it's needed\r\n                    \u003Cul>\r\n                        \u003Cli>Big security issue\u003C/li>\r\n                        \u003Cli>Virtualization performance improvements\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>MSI / MSI-X review (interrupt delivery)\u003C/li>\r\n                    \u003Cli>Shared Peripheral Interrupts (SPIs) vs Locality-specific Peripheral Interrupts (LPIs)\u003C/li>\r\n                    \u003Cli>Interrupt Translation Service (ITS)\r\n                    \u003Cul>\r\n                        \u003Cli>Virtual interrupts\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n            \u003C/ul>","2022-05-17T17:55:40.000000Z","2025-12-08T17:17:50.000000Z",50,"public/live_training_courses/thumbnails/live_training_course_716_thumbnail_1748360195.png","io-virtualization-on-arm-platforms",83,{"id":591,"title":596,"created_at":597,"updated_at":523,"order":146},[664],{"id":600,"name":601,"about":602,"instructor_fullname":139,"instructor_email":140,"price":83,"price_arbor":83,"created_at":39,"updated_at":603,"you_will_learn":586,"equivelent_of":89,"subscription_length":43,"video_id":604,"is_active":12,"prerequisites":45,"modified_at":13,"order":19,"presentation_id":605,"slug":606,"course_category_id":607,"release_date":129,"old_product_id":608,"meta_description":609,"meta_keywords":610,"author_signature":152,"description":611,"meta_title":601,"whats_included":612,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":665},{"live_training_course_id":649,"elearning_course_id":600},[667,708,738,772,802],{"id":668,"name":669,"description":670,"about":671,"you_will_learn":672,"prerequisites":673,"is_active":12,"modified_at":13,"course_outline":674,"created_at":675,"updated_at":676,"duration":326,"category_id":481,"order":89,"thumbnail":677,"slug":678,"old_live_courses_id":13,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":679,"meta_keywords":680,"meta_description":681,"training_materials":682,"category":683,"elearning_courses":687},748,"UFS - Universal Flash Storage","\u003Cp>MindShare's Universal Flash Storage (UFS) course begins with a high-level view of the architecture that provides the big-picture context of the hardware architecture and software interactions. Then, we drill down into details for each aspect of the UFS architecture.\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"UFS\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>UFS model and design goals\u003C/li>\r\n\u003Cli>Definition and functionality of the design layers\u003C/li>\r\n\u003Cli>Overview of the software stack\u003C/li>\r\n\u003Cli>Basics of the UFS Host Controller Interface model\r\n\u003Cul>\r\n\u003Cli>Device initialization\u003C/li>\r\n\u003Cli>How command queues are set up and managed\u003C/li>\r\n\u003Cli>How software Informs the controller of new commands and learns when commands have been completed\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Extended features defined\u003C/li>\r\n\u003Cli>Error reporting structures defined\u003C/li>\r\n\u003Cli>Definition and functionality of the physical interface to the system\r\n\u003Cul>\r\n\u003Cli>UniPro\u003C/li>\r\n\u003Cli>M-PHY\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Power management options for the device and the UniPro interface\u003C/li>\r\n\u003C/ul>","\u003Cp>Previous exposure to SCSI, and a serial transport like PCIe is very helpful. Such familiarity is expected and so those topics are not covered in detail.\u003C/p>","\u003Cp>\u003Cstrong>Part 1 – Introduction\u003C/strong>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>Background and design goals\u003C/li>\r\n\u003Cli>UFS concepts and definitions\r\n\u003Cul>\r\n\u003Cli>Small Computer System Interface (SCSI) objects and interactions\u003C/li>\r\n\u003Cli>SCSI command set overview\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Host-Controller Interface overview\u003C/li>\r\n\u003Cli>UFS layers overview\u003C/li>\r\n\u003Cli>Host-Controller Interface (HCI) overview\r\n\u003Cul>\r\n\u003Cli>Queue Management\r\n\u003Cul>\r\n\u003Cli>Doorbell Head and Tail registers\u003C/li>\r\n\u003Cli>Legacy Transfer requests\u003C/li>\r\n\u003Cli>Multiple Circular Queues (MCQ)\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Register overview\u003C/li>\r\n\u003Cli>Initialization\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>UFS Layers Overview\r\n\u003Cul>\r\n\u003Cli>Application Layer\r\n\u003Cul>\r\n\u003Cli>Commands delivered from HCI\u003C/li>\r\n\u003Cli>Device manager overview\u003C/li>\r\n\u003Cli>Task manager overview\u003C/li>\r\n\u003Cli>Mechanism for Transfer requests\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Transport Layer\r\n\u003Cul>\r\n\u003Cli>Definition of UFS Protocol Information Units (UPIUs)\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>UniPro Interconnect (UIC) Layer\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp>\u003Cstrong>Part 2 – Host-Controller Interface (HCI)\u003C/strong>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>Legacy HCI Transfer Requests\r\n\u003Cul>\r\n\u003Cli>Definition of Transfer Request Descriptors\u003C/li>\r\n\u003Cli>Types of Physical Region Descriptor Tables\u003C/li>\r\n\u003Cli>Command priority\r\n\u003Cul>\r\n\u003Cli>Within a command queue\u003C/li>\r\n\u003Cli>Between Logical Units\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Data UPIUs\r\n\u003Cul>\r\n\u003Cli>Transfer hints from device within data UPIUs\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Multiple Circular Queues\r\n\u003Cul>\r\n\u003Cli>Comparison with NVMe\u003C/li>\r\n\u003Cli>Initializing queues and supporting memory structures\u003C/li>\r\n\u003Cli>Example of tracking queue pointers\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>HCI Register Details\r\n\u003Cul>\r\n\u003Cli>Capability, status, operational, interrupts, and error structures\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>HCI Initialization\r\n\u003Cul>\r\n\u003Cli>Set up registers\u003C/li>\r\n\u003Cli>Initialize all 3 layers\u003C/li>\r\n\u003Cli>Host-Device optimizations\r\n\u003Cul>\r\n\u003Cli>Timestamps\u003C/li>\r\n\u003Cli>Context management\u003C/li>\r\n\u003Cli>Event alerts\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>UIC Initialization\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp>\u003Cstrong>Part 3 – Application and Transport Layers\u003C/strong>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>Simplified list of SCSI Commands supported\u003C/li>\r\n\u003Cli>Setup and use of Logical Units in device\u003C/li>\r\n\u003Cli>Exception events\u003C/li>\r\n\u003Cli>Dynamic Capacity feature to extend drive life\u003C/li>\r\n\u003Cli>Data caching feature\u003C/li>\r\n\u003Cli>Details of UPIUs\u003C/li>\r\n\u003Cli>Details of UFS descriptors, attributes, and flags, accessed with Query commands\u003C/li>\r\n\u003Cli>Extended features\r\n\u003Cul>\r\n\u003Cli>Host Performance Booster\u003C/li>\r\n\u003Cli>File-Based Optimization\u003C/li>\r\n\u003Cli>Unified Memory Extension\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Error reporting\u003C/li>\r\n\u003C/ul>\r\n\u003Cp>\u003Cstrong>Part 4 – UFS Interconnect Layer\u003C/strong>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>MIPI UniPro overview\u003C/li>\r\n\u003Cli>Definition of terms\u003C/li>\r\n\u003Cli>UniPro Layers\r\n\u003Cul>\r\n\u003Cli>Transport layer (L4)\u003C/li>\r\n\u003Cli>Network layer (L3)\u003C/li>\r\n\u003Cli>Link layer (L2)\r\n\u003Cul>\r\n\u003Cli>Flow control protocol\u003C/li>\r\n\u003Cli>Frame acknowledgement protocol\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Phy Adapter layer (L1.5) and M-PHY (L1)\r\n\u003Cul>\r\n\u003Cli>Transmitter operation\u003C/li>\r\n\u003Cli>Receiver operation\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>M-PHY (L1) details\r\n\u003Cul>\r\n\u003Cli>Definition of terms\u003C/li>\r\n\u003Cli>Signaling rates\u003C/li>\r\n\u003Cli>8b/10b Encoding\u003C/li>\r\n\u003Cli>Power conservation\u003C/li>\r\n\u003Cli>Maintaining signal integrity\u003C/li>\r\n\u003Cli>M-PHY Module state machines\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Link Initialization\r\n\u003Cul>\r\n\u003Cli>UniPro state machine\u003C/li>\r\n\u003Cli>Low-speed mode startup sequence\u003C/li>\r\n\u003Cli>High-speed mode startup sequence\u003C/li>\r\n\u003Cli>Discovery and Configuration\r\n\u003Cul>\r\n\u003Cli>Determine shared capabilities\u003C/li>\r\n\u003Cli>Configure attributes\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp>\u003Cstrong>Part 5 – Power Management\u003C/strong>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>Device power management\r\n\u003Cul>\r\n\u003Cli>Power mode states\u003C/li>\r\n\u003Cli>Power changes\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>UniPro power management\r\n\u003Cul>\r\n\u003Cli>State machine\u003C/li>\r\n\u003Cli>Power changes\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp>\u003Cstrong>Additional Topic – Reference M-PHY Module Interface (RMMI)\u003C/strong>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>Introduction\u003C/li>\r\n\u003Cli>Definition of terms\u003C/li>\r\n\u003Cli>Examples of operation\u003C/li>\r\n\u003Cli>Protocol throttling\u003C/li>\r\n\u003C/ul>","2025-06-24T16:18:34.000000Z","2025-07-30T14:09:10.000000Z","public/live_training_courses/thumbnails/live_training_course_748_thumbnail_1750781914.png","ufs","UFS 4.0","universal flash storage, ufs, training","ufs training course","\u003Cul>\r\n\u003Cli>PDF of course slides\u003C/li>\r\n\u003Cli>Optional add-on: \u003Ca href=\"../../elearning-course/ufs4-elearning-course\">UFS 4.0 eLearning Course\u003C/a> (discounted pricing applies)\u003C/li>\r\n\u003C/ul>",{"id":481,"title":684,"created_at":685,"updated_at":686,"order":86},"Storage Technology","2024-01-15T12:04:23.000000Z","2024-12-26T15:14:18.000000Z",[688],{"id":689,"name":690,"about":691,"instructor_fullname":36,"instructor_email":36,"price":692,"price_arbor":692,"created_at":39,"updated_at":693,"you_will_learn":694,"equivelent_of":207,"subscription_length":43,"video_id":695,"is_active":696,"prerequisites":697,"modified_at":13,"order":481,"presentation_id":698,"slug":699,"course_category_id":700,"release_date":701,"old_product_id":702,"meta_description":690,"meta_keywords":703,"author_signature":55,"description":691,"meta_title":704,"whats_included":705,"evaluation_id":706,"vector_store_id":13,"ai_assistant_id":13,"pivot":707},1729,"Universal Flash Storage (UFS) eLearning Course","\u003C!DOCTYPE html PUBLIC \"-//W3C//DTD HTML 4.0 Transitional//EN\" \"http://www.w3.org/TR/REC-html40/loose.dtd\">\r\n\u003Chtml>\u003Cbody>\u003Cp>\u003Cspan style=\"color: rgb(108, 108, 108); font-size: 18px; font-weight: bold;\">Universal Flash Storage (UFS) eLearning Course Info\u003C/span>\u003C/p>\r\n\r\n\r\n\r\n\r\n\r\n\u003Cdiv style=\"padding: 12px; width: 580px; background-image: url(/images/lb-horiz-fade.gif); background-repeat: repeat-y; color: rgb(84, 100, 104); font-size: 10px;\">\r\n\r\n\u003C/div>\u003C/body>\u003C/html>","695","2026-02-02T18:45:09.000000Z","\u003Cdiv>\r\n\u003Cul>\r\n\u003Cli>Design goals for the UFS interface\u003C/li>\r\n\u003Cli>Definition of terms\u003C/li>\r\n\u003Cli>Description of the Host-Controller Interface\u003C/li>\r\n\u003Cli>UFS Layers\u003C/li>\r\n\u003Cli>Command set details\u003C/li>\r\n\u003Cli>Details of UniPro layers\u003C/li>\r\n\u003Cli>M-PHY details\u003C/li>\r\n\u003C/ul>\r\n\u003C/div>",37735,false,"",432,"universal-flash-storage-ufs-elearning-course",18,"2024-11-14 22:48:50",604,"UFS, elearning, online training, mindshare, universal flash storage, tutorial","null","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/ufs_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/ufs_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>Universal Flash Storage eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 90 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",358,{"live_training_course_id":668,"elearning_course_id":689},{"id":431,"name":709,"description":710,"about":711,"you_will_learn":712,"prerequisites":713,"is_active":12,"modified_at":13,"course_outline":714,"created_at":715,"updated_at":716,"duration":326,"category_id":481,"order":481,"thumbnail":717,"slug":718,"old_live_courses_id":719,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":720,"category":721,"elearning_courses":722},"NVMe - NVM Express","\u003Cp class=\"p1\">\u003Cspan style=\"font-size: 12pt;\">MindShare's NVMe (Non-Volatile Memory Express) 2.2 course begins with a high-level view of this storage architecture to give the big-picture context for hardware and software interactions. We drill down into details for each aspect of NVMe. Next, we review all the changes and added features to the more recent spec revisions. Since NVMe-oF (NVMe over Fabrics) was combined with the original NVMe definition in the 2.0 spec revision, we include a thorough coverage of that as well. Finally, because many implementations of NVMe will use PCI Express (PCIe), a brief overview of that interface is included.\u003C/span>\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"NVM Express (NVMe)\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">Basics of the NVMe Host Controller Interface model\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">The steps for device initialization\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">How command queues are set up and managed\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">How the host software\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003C!-- [if !supportLists]-->\u003C!--[endif]-->\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Informs the controller of new commands to execute\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003C!-- [if !supportLists]-->\u003C!--[endif]-->\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Learns that commands have been completed\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">The list of defined commands and how they work\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">How error reporting structures are defined\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">Power management options\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">The new features added with the more recent revisions to the spec (2.0, 2.1, and 2.2)\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">An overview of the storage fabrics in use today, and their strengths and weaknesses\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">The changes needed for NVMe to work in a fabric environment\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">How an NVMe host finds and accesses drives on a fabric\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">How NVMe-oF provides a combination of attractive features for a storage fabric\u003C/span>\u003C/li>\r\n\u003C/ul>","\u003Cp class=\"MsoNormal\" style=\"margin-bottom: 0in; line-height: normal; mso-layout-grid-align: none; text-autospace: none;\">\u003Cspan style=\"font-size: 12pt; font-family: helvetica, arial, sans-serif; color: rgb(13, 13, 13);\">Previous exposure to PCIe is very helpful, as is some general knowledge of PC architecture. Additionally, some knowledge of legacy storage protocols such as SAS and networking protocols such as Ethernet is helpful. \u003C/span>\u003C/p>","\u003Cp>\u003Cspan style=\"font-size: 12pt;\">\u003Cstrong>Basic Topics (Covered on Day 1)\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">PCIe Architecture Overview\u003C/span>\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003C!-- [if !supportLists]-->\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Introduction\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Basic operation\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Transaction types\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Layers and responsibilities overview\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>NVMe Introduction\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">NVMe concepts and definitions\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Comparison with SATA\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">NVMe Host-Controller Interface overview\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Queue Management\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Doorbell Head and Tail registers\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Execution sequence\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Tracking completion status\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Commands\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">NVMe Admin Commands\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">General Structure of commands\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Identify command options and results\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Creation and management of Queues\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Asynchronous Event Notification\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">NVMe IO Commands\u003C/span>\r\n\u003Cul>\r\n\u003Cli>Read and Write command structure\u003C/li>\r\n\u003Cli>Optimizing write commands\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003C!--[endif]-->Avoiding write amplification\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003C!--[endif]-->Buffer addressing modes (PRPs vs. SGLs)\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003C!--[endif]-->Priority and Arbitration of commands\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003C!--[endif]-->Completing commands\u003C/span>\u003C/li>\r\n\u003Cli>Handling Metadata (DIF/DIX)\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003C!--[endif]-->Get Features / Set Features – full coverage of features\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp>\u003Cspan style=\"font-size: 12pt;\">\u003Cstrong>Additional Topics (Covered on Day 2)\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Architecture\u003C/span>\r\n\u003Cul>\r\n\u003Cli>Error reporting, Error Reporting Structures\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Asynchronous Events\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Completion status\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Log pages\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Other log pages\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Firmware updates\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Controller registers\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Controller initialization\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Power Management\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Reservations\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"p1\">\u003Cspan style=\"font-size: 12pt;\"> \u003C/span>\u003Cspan style=\"font-size: 12pt;\">\u003C!-- [if !supportLists]-->\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Other NVMe commands\u003C/span>\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Write uncorrectable\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Write zeroes\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Compare\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Dataset management\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Configuration overview\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Summary of changes for 1.3\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Boot partitions\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Thermal management by host\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Write streams\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Deallocation\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Virtualization support\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Debug support – Telemetry, initiated by host or device\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Self-test options\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Sanitize command\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">New commands\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Summary of changes for 1.4\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">NVM Sets\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">I/O Determinism\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Read recovery levels\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Persistent Memory Region (PMR)\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">Asymmetric Namespace Access (ANA)\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Namespace write protect\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Persistent event log\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Rebuild assist\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Endurance groups\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">I/O Performance and Endurance Hints\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Traffic-based Keep Alive\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Vendor-specific UUIDs\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Verify - new command\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Administrative controller\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">SQ Associations\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp>\u003Cstrong style=\"font-size: 12pt;\">Additional Topics (Covered on Day 3)\u003C/strong>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Summary of changes for 2.0 through 2.2\u003C/span>\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Flexible Data Placement\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Live Migration\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Dispersed Namespaces (NS)\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Device Personalities\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Rotational (Spinning) media support\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Telemetry Log Changes\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Persistent Event Log Enhancements\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Updated I/O Commands\u003C/div>\r\n\u003Cul>\r\n\u003Cli>NVM Command Set\u003C/li>\r\n\u003Cli>Computational Command Set Overview\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Updated Admin Commands\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Controller Register Enhancements\u003C/div>\r\n\u003Cul>\r\n\u003Cli>CMB Write Buffer registers\u003C/li>\r\n\u003Cli>Time To Ready\u003C/li>\r\n\u003Cli>Shutdown options\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Zoned Namespaces Overview\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Key Value Overview\u003C/div>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp>\u003Cstrong style=\"font-size: 12pt;\">NVMe-oF Topics (Covered on Day 4)\u003C/strong>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Introduction\u003C/span>\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Motivation for moving NVMe to fabrics\u003C/span>\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Improve storage network performance \u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Avoid limitations of PCIe, extend NVMe protocol to the fabric\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Optimize access latency across the network\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Differences from base NVMe\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Initialization Background\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Fabric Discovery\u003C/span>\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Discovery Service, Discovery Controllers\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Discovery Mechanism\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>NVMe-oF Initialization\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">Fabrics Commands\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">Device Setup\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Transport mapping/binding RDMA\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Introduction to RDMA (Remote Direct Memory Access)\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">Protocol Translation\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">RDMA Examples\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>RDMA Concepts\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">Motivation: Kernel bypass – reduce CPU involvement\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">Zero-copy operation when possible\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">RNIC (RDMA-aware Network Interface Card)\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Pinned remote memory and storage\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Command-based Flow Control\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Read and Write Command Examples\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>NVMe-oF Details\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Controller Initialization\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Connections and Associations\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Static vs. Dynamic Controller model\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Properties instead of registers\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Authentication\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">Encapsulation\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">Accessing RDMA Queue pairs\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Data transfer: Command, Response, Data, Flow Control\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Fabrics Commands and Responses\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>RNIC Details\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Software Layers\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">RDMA Verbs\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Memory Regions and Windows\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Ethernet overview\r\n\u003Cul>\r\n\u003Cli>TCP/IP: addressing, layers, packets\u003C/li>\r\n\u003Cli>RDMA models added to it: RoCE and iWARP\r\n\u003Cul>\r\n\u003Cli>Overview of iWARP\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Added to TCP/IP, so packets are routable and don’t need DCB\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Messages\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Layers\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Advantages and disadvantages\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Overview of RoCE\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Version 2 packets include routing information, version 1 did not\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Use of Data Center Bridging (DCB) to manage routing\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Flow control\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Soft RoCE\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Advantages and disadvantages\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>","2024-05-14T10:40:42.000000Z","2025-12-18T14:32:50.000000Z","public/live_training_courses/thumbnails/live_training_course_706_thumbnail_1747668783.png","nvme",62,"\u003Cul>\r\n\u003Cli style=\"font-family: helvetica, arial, sans-serif; font-size: 12pt;\">\u003Cspan style=\"font-family: helvetica, arial, sans-serif; font-size: 12pt;\">PDF of course slides\u003C/span>\u003C/li>\r\n\u003Cli style=\"font-size: 12pt; font-family: helvetica, arial, sans-serif;\">\u003Cspan style=\"font-size: 12pt; font-family: helvetica, arial, sans-serif;\">Optional add-on: NVMe 2.2 eLearning\u003C/span>\u003C/li>\r\n\u003C/ul>",{"id":481,"title":684,"created_at":685,"updated_at":686,"order":86},[723],{"id":724,"name":725,"about":726,"instructor_fullname":36,"instructor_email":37,"price":692,"price_arbor":220,"created_at":39,"updated_at":727,"you_will_learn":728,"equivelent_of":146,"subscription_length":43,"video_id":729,"is_active":12,"prerequisites":164,"modified_at":730,"order":146,"presentation_id":731,"slug":732,"course_category_id":700,"release_date":129,"old_product_id":507,"meta_description":733,"meta_keywords":734,"author_signature":55,"description":735,"meta_title":725,"whats_included":736,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":737},1746,"NVM Express 1.4 eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"NVMe\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","2026-02-02T20:57:29.000000Z","\u003Cul>\r\n\u003Cli>Basics of the NVMe Host Controller Interface model\u003C/li>\r\n\u003Cli>The steps for device initialization\u003C/li>\r\n\u003Cli>How command queues are set up and managed\u003C/li>\r\n\u003Cli>How host software:\r\n\u003Cul>\r\n\u003Cli style=\"list-style-type: none;\">\r\n\u003Cul>\r\n\u003Cli>Informs the controller of new commands to execute\u003C/li>\r\n\u003Cli>Learns that commands have been completed\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>What commands are defined up to 1.4 spec, and how they work\u003C/li>\r\n\u003Cli>Error reporting structures\u003C/li>\r\n\u003Cli>Power management options\u003C/li>\r\n\u003Cli>Optional PCIe architecture overview on request\u003C/li>\r\n\u003C/ul>",37752,"2025-01-02 16:45:25",488,"nvm-express-14-elearning-course","NVM Express 1.4","nvme 1.4","\u003Cp>MindShare's NVMe (Non-Volatile Memory Express) 1.4 course begins with an optional review of PCI Express (PCIe) basics as a foundation for the study of NVMe. Next, a high-level view of the architecture provides the big-picture context of the hardware architecture and software interactions. Finally, we drill down into details for each aspect of the NVMe architecture. The course add details included in the 1.1, 1.2, 1.3 and 1.4 specs. \u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/nvme14_modules.png\" alt=\"PCIe Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/nvme14_slides.png\" alt=\"PDF Slides Thumbnail\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg style=\"max-height: 150px;\" src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/pcie3_cover_ds.png\" alt=\"PCIe eBook\" width=\"125\" height=\"155\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>NVM Express 1.4 eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PCI Express eBook\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume / CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":431,"elearning_course_id":724},{"id":739,"name":740,"description":741,"about":742,"you_will_learn":743,"prerequisites":744,"is_active":12,"modified_at":13,"course_outline":745,"created_at":746,"updated_at":747,"duration":311,"category_id":481,"order":748,"thumbnail":749,"slug":750,"old_live_courses_id":751,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":752,"category":753,"elearning_courses":754},720,"NVMe-oF","\u003Cp>MindShare's NVMe-oF (Non-Volatile Memory Express – over Fabrics) course begins with a brief review of NVMe basics, discusses the forces driving the migration of NVMe into network fabrics, followed by an overview of the different fabrics NVMe-oF will work over such as Ethernet, InfiniBand and Fibre Channel. Finally, the details of NVMe over fabrics are described.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"NVMe-oF\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>An overview of the storage fabrics in use today, and their strengths and weaknesses\u003C/li>\r\n\u003Cli>The changes needed for NVMe to work in a fabric environment\u003C/li>\r\n\u003Cli>How an NVMe host discovers and accesses drives on the fabric\u003C/li>\r\n\u003Cli>How NVMe-oF provides a combination of attractive features for a storage fabric\u003C/li>\r\n\u003C/ul>","\u003Cp>NVMe architecture knowledge and previous exposure to PCIe is needed, as is some general knowledge of PC architecture.\u003C/p>","\u003Cul>\r\n                \u003Cli>NVMe Background (as much as needed)\r\n                \u003Cul>\r\n                    \u003Cli>NVMe basics: registers, queue management, commands and completions\u003C/li>\r\n                    \u003Cli>HCI shared-system-memory model\u003C/li>\r\n                    \u003Cli>NVMe over PCIe\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Introduction to NVMe-oF\r\n                \u003Cul>\r\n                    \u003Cli>Motivation for moving NVMe to fabrics\r\n                    \u003Cul>\r\n                        \u003Cli>Improve storage network performance compared to legacy protocols\u003C/li>\r\n                        \u003Cli>Avoid limitations of PCIe, extend NVMe protocol to the fabric\u003C/li>\r\n                        \u003Cli>Optimize access latency across the network\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Differences from base NVMe\u003C/li>\r\n                    \u003Cli>Initialization Background\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Fabric Discovery\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Discovery Service, Discovery Controllers\u003C/li>\r\n                    \u003Cli>Discovery Mechanism\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>NVMe-oF Initialization\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Fabrics Commands\u003C/li>\r\n                    \u003Cli>Device Setup\u003C/li>\r\n                    \u003Cli>Transport mapping/binding RDMA\u003C/li>\r\n                    \u003Cli>Introduction to RDMA (Remote Direct Memory Access)\u003C/li>\r\n                    \u003Cli>Protocol Translation\u003C/li>\r\n                    \u003Cli>RDMA Examples\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>RDMA Concepts\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Motivation: Kernel bypass – reduce CPU involvement\u003C/li>\r\n                    \u003Cli>Zero-copy operation when possible\u003C/li>\r\n                    \u003Cli>RNIC (RDMA-aware Network Interface Card)\u003C/li>\r\n                    \u003Cli>Pinned remote memory and storage\u003C/li>\r\n                    \u003Cli>Command-based Flow Control\u003C/li>\r\n                    \u003Cli>Read and Write Command Examples\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>NVMe-oF Details\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Controller Initialization\u003C/li>\r\n                    \u003Cli>Connections and Associations\u003C/li>\r\n                    \u003Cli>Static vs. Dynamic Controller model\u003C/li>\r\n                    \u003Cli>Properties instead of registers\u003C/li>\r\n                    \u003Cli>Authentication\u003C/li>\r\n                    \u003Cli>Encapsulation\u003C/li>\r\n                    \u003Cli>Accessing RDMA Queue pairs\u003C/li>\r\n                    \u003Cli>Data transfer: Command, Response, Data, Flow Control\u003C/li>\r\n                    \u003Cli>Fabrics Commands and Responses\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>RNIC Details\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Software Layers\u003C/li>\r\n                    \u003Cli>RDMA Verbs\u003C/li>\r\n                    \u003Cli>Memory Regions and Windows\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Ethernet overview \u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>TCP/IP: addressing, layers, packets\u003C/li>\r\n                    \u003Cli>RDMA models added to it: RoCE and iWARP.\u003Cbr>\r\n                    \u003Cul>\r\n                        \u003Cli>Overview of iWARP\u003Cbr>\r\n                        \u003Cul>\r\n                            \u003Cli>Added to TCP/IP, so packets are routable and don’t need DCB\u003C/li>\r\n                            \u003Cli>Messages\u003C/li>\r\n                            \u003Cli>Layers\u003C/li>\r\n                            \u003Cli>Advantages and disadvantages\u003C/li>\r\n                        \u003C/ul>\r\n                        \u003C/li>\r\n                        \u003Cli>Overview of RoCE \u003Cbr>\r\n                        \u003Cul>\r\n                            \u003Cli>Version 2 packets include routing information, version 1 did not\u003C/li>\r\n                            \u003Cli>Use of Data Center Bridging (DCB) to manage routing\u003C/li>\r\n                            \u003Cli>Flow control\u003C/li>\r\n                            \u003Cli>Soft RoCE\u003C/li>\r\n                            \u003Cli>Advantages and disadvantages\u003C/li>\r\n                        \u003C/ul>\r\n                        \u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n            \u003C/ul>","2024-05-14T10:42:41.000000Z","2025-06-03T17:18:28.000000Z",20,"public/live_training_courses/thumbnails/live_training_course_720_thumbnail_1747668839.png","nvme-of",87,"\u003Cul>\r\n\u003Cli>PDF of course slides\u003C/li>\r\n\u003Cli>Optional add-on: \u003Ca href=\"../../elearning-course/nvme-of-elearning-course\">NVMe-oF eLearning Course\u003C/a>\u003C/li>\r\n\u003C/ul>",{"id":481,"title":684,"created_at":685,"updated_at":686,"order":86},[755,770],{"id":756,"name":757,"about":758,"instructor_fullname":36,"instructor_email":37,"price":38,"price_arbor":38,"created_at":39,"updated_at":727,"you_will_learn":759,"equivelent_of":42,"subscription_length":43,"video_id":760,"is_active":12,"prerequisites":761,"modified_at":13,"order":86,"presentation_id":762,"slug":763,"course_category_id":700,"release_date":129,"old_product_id":764,"meta_description":765,"meta_keywords":766,"author_signature":55,"description":767,"meta_title":757,"whats_included":768,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":769},1764,"NVMe-oF eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"NVMe-oF\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cdiv>\r\n\u003Cul>\r\n\u003Cli>An overview of the storage fabrics in use today, and their strengths and weaknesses\u003C/li>\r\n\u003Cli>The changes needed for NVMe to work in a fabric environment\u003C/li>\r\n\u003Cli>How an NVMe host discovers and accesses drives on the fabric\u003C/li>\r\n\u003Cli>How NVMe-oF provides a combination of attractive features for a storage fabric\u003C/li>\r\n\u003C/ul>\r\n\u003C/div>",37770,"\u003Cp>NVMe architecture knowledge and previous exposure to PCIe is needed, as is some general knowledge of PC architectures.\u003C/p>",517,"nvme-of-elearning-course",862,"NVMe-oF eLearning course","nvme-of, nvme over fabrics, training, online, tutorial","\u003Cp>MindShare's NVMe-oF (Non-Volatile Memory Express – over Fabrics) course begins with a brief review of NVMe basics, discusses the forces driving the migration of NVMe into network fabrics, followed by an overview of the different fabrics NVMe-oF will work over such as Ethernet, InfiniBand and Fibre Channel. Finally, the details of NVMe over fabrics are described. \u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/nvmeof_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/nvmeof_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>NVMe-oF eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":739,"elearning_course_id":756},{"id":724,"name":725,"about":726,"instructor_fullname":36,"instructor_email":37,"price":692,"price_arbor":220,"created_at":39,"updated_at":727,"you_will_learn":728,"equivelent_of":146,"subscription_length":43,"video_id":729,"is_active":12,"prerequisites":164,"modified_at":730,"order":146,"presentation_id":731,"slug":732,"course_category_id":700,"release_date":129,"old_product_id":507,"meta_description":733,"meta_keywords":734,"author_signature":55,"description":735,"meta_title":725,"whats_included":736,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":771},{"live_training_course_id":739,"elearning_course_id":724},{"id":773,"name":774,"description":775,"about":776,"you_will_learn":777,"prerequisites":778,"is_active":12,"modified_at":13,"course_outline":779,"created_at":780,"updated_at":781,"duration":183,"category_id":481,"order":782,"thumbnail":783,"slug":784,"old_live_courses_id":785,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":786,"category":787,"elearning_courses":788},707,"SAS - Serial Attached SCSI","\u003Cp>MindShare's SAS Architecture course provides a comprehensive understanding of the Serial Attached SCSI interface. The course covers all aspects of the standard, primarily from a hardware perspective, and compares the usage model of SAS with other enterprise interface designs. Practical examples of the discovery process, transactions on the link, and error conditions help provide a great introduction for those new to this material. MindShare’s established background in legacy platform design, coupled with a comprehensive understanding of the latest bus technologies, provides rich insight into the SAS design and results in a superior training experience. This course will provide the kind of in-depth information, example implementations, and practical guidance that will give your team a running start on working with SAS.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"SAS\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>The basics of the serial interface\u003C/li>\r\n\u003Cli>System topology considerations\u003C/li>\r\n\u003Cli>How connections are built and handled\u003C/li>\r\n\u003Cli>How the SAS infrastructure handles different protocols\u003C/li>\r\n\u003Cli>The responsibilities of each design layer\u003C/li>\r\n\u003Cli>How problems are reported and handled\u003C/li>\r\n\u003Cli>The changes made to SAS 3.0\u003C/li>\r\n\u003C/ul>","\u003Cp>A basic understanding of SCSI is recommended but not required.\u003C/p>","\u003Cul>\r\n                \u003Cli>Background\u003C/li>\r\n                \u003Cli>Introduction to SAS\u003C/li>\r\n                \u003Cli>Usage Model\u003C/li>\r\n                \u003Cli>Introduction to Architectural Layers\u003C/li>\r\n                \u003Cli>Application Layer Responsibilities\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Discovery process\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Transport layer Responsibilities\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Protocols\u003C/li>\r\n                    \u003Cli>SSP and Error Handling\u003Cbr>\r\n                    \u003Cul>\r\n                        \u003Cli>STP\u003C/li>\r\n                        \u003Cli>SMP\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Frames\u003C/li>\r\n                    \u003Cli>IUs\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Port Layer Responsibilities\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Call Center Model\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Link Layer Responsibilities\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Primitives\u003C/li>\r\n                    \u003Cli>Address Frames\u003C/li>\r\n                    \u003Cli>Serial Support\u003C/li>\r\n                    \u003Cli>Connections\u003C/li>\r\n                    \u003Cli>Arbitration\u003C/li>\r\n                    \u003Cli>Protocol differences\u003C/li>\r\n                    \u003Cli>ACK/NAK Protocol\u003C/li>\r\n                    \u003Cli>Flow Control\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Phy Layer Responsibilities\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>8b/10b Encoding\u003C/li>\r\n                    \u003Cli>OOB\u003C/li>\r\n                    \u003Cli>Initialization\u003C/li>\r\n                    \u003Cli>Resets\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Physical Layer Responsibilities\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Differential signaling\u003C/li>\r\n                    \u003Cli>Inter-Symbol Interference and Compensation\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Expander Devices\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Discovery\u003C/li>\r\n                    \u003Cli>Building Connections\u003C/li>\r\n                    \u003Cli>Connection Arbitration\u003C/li>\r\n                    \u003Cli>Zoning\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>SATA Support\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>STP Protocol\u003C/li>\r\n                    \u003Cli>SATA Initialization\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Changes for SAS 2.0 and 3.0\u003C/li>\r\n            \u003C/ul>","2022-07-28T12:15:43.000000Z","2025-06-03T17:22:51.000000Z",30,"public/live_training_courses/thumbnails/live_training_course_707_thumbnail_1747668950.png","sas",63,"\u003Cul>\r\n\u003Cli>PDF of course slides\u003C/li>\r\n\u003Cli>\"\u003Ca href=\"../../ebook/sas-storage-architecture\">SAS Storage Architecture\u003C/a>\" eBook\u003C/li>\r\n\u003Cli>Optional add-on: \u003Ca href=\"../../elearning-course/sas-30-storage-technology-elearning-course\">SAS 3.0 Storage Technology eLearning course\u003C/a>\u003C/li>\r\n\u003C/ul>",{"id":481,"title":684,"created_at":685,"updated_at":686,"order":86},[789],{"id":790,"name":791,"about":792,"instructor_fullname":36,"instructor_email":37,"price":692,"price_arbor":692,"created_at":39,"updated_at":793,"you_will_learn":777,"equivelent_of":86,"subscription_length":43,"video_id":794,"is_active":12,"prerequisites":45,"modified_at":13,"order":89,"presentation_id":795,"slug":796,"course_category_id":700,"release_date":129,"old_product_id":797,"meta_description":791,"meta_keywords":798,"author_signature":55,"description":799,"meta_title":791,"whats_included":800,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":801},1736,"SAS 3.0 Storage Technology eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"SAS 3.0\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","2025-12-08T21:35:51.000000Z",37742,463,"sas-30-storage-technology-elearning-course",661,"sas, serial attached scsi, training, tutorial, elearning, online","\u003Cp>MindShare’s SAS Architecture course provides a comprehensive understanding of the Serial Attached SCSI interface. The course covers all aspects of the standard, primarily from a hardware perspective, and compares the usage model of SAS with other enterprise interface designs. Practical examples of the discovery process, transactions on the link, and error conditions help provide a great introduction for those new to this material. MindShare’s established background in legacy platform design, coupled with a comprehensive understanding of the latest bus technologies, provides rich insight into the SAS design and results in a superior training experience. This course will provide the kind of in-depth information, example implementations, and practical guidance that will give your team a running start on working with SAS.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/sas3_modules.png\" alt=\"PCIe Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/sas3_slides.png\" alt=\"PDF Slides Thumbnail\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg style=\"max-height: 150px;\" src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/sas_ebook.jpg\" alt=\"PCIe eBook\" width=\"130\" height=\"145\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>SAS 3.0 eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>SAS eBook\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume / CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":773,"elearning_course_id":790},{"id":803,"name":804,"description":805,"about":806,"you_will_learn":807,"prerequisites":808,"is_active":12,"modified_at":13,"course_outline":809,"created_at":810,"updated_at":811,"duration":183,"category_id":481,"order":812,"thumbnail":813,"slug":814,"old_live_courses_id":815,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":816,"category":817,"elearning_courses":818},708,"SATA - Serial ATA","\u003Cp>MindShare brings the SATA course to life through its interactive classroom style, demonstrations, and hands-on exercises. This course covers the SATA 3.2 specification from a hardware design perspective and also discusses the software requirements of SATA implementations (Includes SATA Express and M.2). The Advanced Host Controller Interface (AHCI) is also described along with its numerous registers.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"Serial ATA\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>The The sequence of events associated with SATA initialization, including Out Of Band (OOB) signaling\u003C/li>\r\n\u003Cli>Detailed operation of a SATA HBA and drive when executing legacy commands\u003C/li>\r\n\u003Cli>How to verify proper command protocol associated with each of the command categories\u003C/li>\r\n\u003Cli>How to verify proper control protocol associated with writes to the Control register\u003C/li>\r\n\u003Cli>How to validate proper FIS (Frame Information Structure) protocol given trace captures from a SATA protocol analyzer\u003C/li>\r\n\u003Cli>The actions taken by each layer in the SATA interface\u003C/li>\r\n\u003Cli>The details associated with the implementation of Port Multipliers\u003C/li>\r\n\u003Cli>The operation and performance advantages of Native Command Queuing (NCQ)\u003C/li>\r\n\u003Cli>SATA Express implementation and features\u003C/li>\r\n\u003Cli>M.2 sockets and modules for SSD applications\u003C/li>\r\n\u003Cli>Advanced Host Controller Interface (AHCI) fundamentals\u003C/li>\r\n\u003Cli>How to use Arbor to view AHCI registers\u003C/li>\r\n\u003C/ul>","\u003Cp>A solid understanding of one or more storage bus protocols such as ATA or similar architecture is recommended but not required.\u003C/p>","\u003Cp>\u003Cspan style=\"text-decoration: underline;\">\u003Cstrong>Part I: SATA Overview\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>Evolution of Parallel ATA\u003C/li>\r\n\u003Cli>Motivation for SATA\u003C/li>\r\n\u003Cli>SATA Overview\u003Cbr>\r\n\u003Cul>\r\n\u003Cli>\u003Cstrong>HANDS-ON ARBOR LAB\u003C/strong>: Scan system and understand Arbor features\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"text-decoration: underline;\">\u003Cstrong>Part II: FIS Transmission Protocols\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>FIS Types & Formats\u003C/li>\r\n\u003Cli>Transport & Link Protocol Details\u003C/li>\r\n\u003Cli>FIS Retry (Transport Layer)\u003C/li>\r\n\u003Cli>Data Flow Control\u003C/li>\r\n\u003Cli>Physical Layer Functions\u003C/li>\r\n\u003Cli>Error Detection & Handling\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"text-decoration: underline;\">\u003Cstrong>Part III: Command & Control Protocols\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>Device Control Protocols\u003C/li>\r\n\u003Cli>Device Command Protocols\u003C/li>\r\n\u003Cli>Native Command Queuing (NCQ)\u003C/li>\r\n\u003Cli>NCQ Protocols\u003C/li>\r\n\u003Cli>New Commands & Subcommands\u003C/li>\r\n\u003Cli>NCQ Log Addresses\r\n\u003Cul>\r\n\u003Cli>\u003Cstrong>HANDS-ON ARBOR LAB\u003C/strong>: Verify NCQ operation\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"text-decoration: underline;\">\u003Cstrong>Part IV: Server Implementations\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>Port Multipliers\u003C/li>\r\n\u003Cli>Port Selectors\u003C/li>\r\n\u003Cli>Enclosure Services\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"text-decoration: underline;\">\u003Cstrong>Part V: Physical Layer Details\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>SATA Initialization\u003C/li>\r\n\u003Cli>AFE & Electrical Details\u003C/li>\r\n\u003Cli>Link Power Management\u003C/li>\r\n\u003Cli>Hot Plug\u003C/li>\r\n\u003Cli>Built-In Test (BIST)\u003C/li>\r\n\u003Cli>Cables/Connectors\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"text-decoration: underline;\">\u003Cstrong>Part VI SATA Express (SATA-IO) Overview\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>Introduction to SATA Express\u003C/li>\r\n\u003Cli>SATA Express Connectors / Receptacles\u003C/li>\r\n\u003Cli>PCIe Drives/SATA Drives/SATA Legacy Drives\u003C/li>\r\n\u003Cli>Connector Matrix\u003C/li>\r\n\u003Cli>SATA Express Pinouts\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"text-decoration: underline;\">\u003Cstrong>Part VII M.2 Sockets & Modules (PCI SIG) Overview\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>Introduction to M.2\u003C/li>\r\n\u003Cli>Socket 2 & Socket 3 for SSDs\u003C/li>\r\n\u003Cli>M.2 Supports SATA/PCIe Speeds\u003C/li>\r\n\u003Cli>Module dimensions\u003C/li>\r\n\u003Cli>M.2 Pinouts\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"text-decoration: underline;\">\u003Cstrong>Part VIII: Advanced Host Controller Interface Overview\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>PCIe Configuration of AHCI\r\n\u003Cul>\r\n\u003Cli>\u003Cstrong>HANDS-ON ARBOR LAB\u003C/strong>: Evaluating the AHCI Capability Registers\u003C/li>\r\n\u003Cli>\u003Cstrong>HANDS-ON ARBOR LAB\u003C/strong>: Evaluating the Port Registers\u003C/li>\r\n\u003Cli>\u003Cstrong>HANDS-ON ARBOR LAB\u003C/strong>: Evaluating the Memory Structures\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>","2022-07-28T12:17:13.000000Z","2025-06-03T17:26:24.000000Z",40,"public/live_training_courses/thumbnails/live_training_course_708_thumbnail_1747669010.png","serial-ata",64,"\u003Cul>\r\n\u003Cli>PDF of course slides\u003C/li>\r\n\u003Cli>\"\u003Ca href=\"../../ebook/sata-storage-technology\">SATA Storage Technology\u003C/a>\" eBook\u003C/li>\r\n\u003Cli>Optional add-on: \u003Ca href=\"../../elearning-course/sata-32-technology-elearning-course\">SATA 3.2 Technology eLearning course\u003C/a>\u003C/li>\r\n\u003Cli>Optional add-on: \u003Ca href=\"../../elearning-course/advanced-host-controller-interface-ahci-elearning-course\">Advanced Host Controller Interface (AHCI) eLearning course\u003C/a>\u003C/li>\r\n\u003C/ul>",{"id":481,"title":684,"created_at":685,"updated_at":686,"order":86},[819,833],{"id":820,"name":821,"about":822,"instructor_fullname":36,"instructor_email":37,"price":823,"price_arbor":823,"created_at":39,"updated_at":793,"you_will_learn":824,"equivelent_of":86,"subscription_length":43,"video_id":825,"is_active":12,"prerequisites":704,"modified_at":13,"order":47,"presentation_id":826,"slug":827,"course_category_id":700,"release_date":51,"old_product_id":147,"meta_description":828,"meta_keywords":829,"author_signature":55,"description":830,"meta_title":828,"whats_included":831,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":832},1718,"SATA 3.2 Technology eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"SATA\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","795","\u003Cdiv>\r\n\u003Cul>\r\n\u003Cli>The sequence of events associated with SATA initialization, including Out Of Band (OOB) signaling\u003C/li>\r\n\u003Cli>Details regarding the implementation and operation of the Advanced Host Controller Interface (AHCI)\u003C/li>\r\n\u003Cli>How to verify proper command protocol associated with each of the command categories\u003C/li>\r\n\u003Cli>How to verify proper control protocol associated with writes to the Control register\u003C/li>\r\n\u003Cli>The actions taken by each layer in the SATA interface\u003C/li>\r\n\u003Cli>The details associated with the implementation of Port Multipliers\u003C/li>\r\n\u003Cli>The operation and performance advantages of Native Command Queuing (NCQ)\u003C/li>\r\n\u003Cli>The new features associated with the SATA Express SSDs and M.2 mobile cards\u003C/li>\r\n\u003Cli>How the three SATA Express drives are detected\u003C/li>\r\n\u003Cli>The mating compatibility of the SATA Express plug and receptacles\u003C/li>\r\n\u003Cli>The compatibility associated with the M.2 modules and sockets\u003C/li>\r\n\u003C/ul>\r\n\u003C/div>",37724,385,"sata-32-technology-elearning-course","Serial ATA eLearning course","serial ata, sata, elearning, mindshare, online, training","\u003Cp>MindShare brings the SATA course to life through its interactive classroom style, demonstrations, and hands-on exercises. This course covers the SATA 3.2 specification from a hardware design perspective and also discusses the software requirements of SATA implementations (Includes SATA Express and M.2). The Advanced Host Controller Interface (AHCI) is also described along with its numerous registers.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/sata3_modules.png\" alt=\"PCIe Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/sata3_slides.png\" alt=\"PDF Slides Thumbnail\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg style=\"max-height: 150px;\" src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/sata_ebook.jpg\" alt=\"PCIe eBook\" width=\"130\" height=\"145\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>SATA 3.2 eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>SATA eBook\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume / CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":803,"elearning_course_id":820},{"id":61,"name":62,"about":63,"instructor_fullname":36,"instructor_email":37,"price":64,"price_arbor":64,"created_at":39,"updated_at":65,"you_will_learn":66,"equivelent_of":42,"subscription_length":43,"video_id":67,"is_active":12,"prerequisites":68,"modified_at":13,"order":69,"presentation_id":70,"slug":71,"course_category_id":50,"release_date":51,"old_product_id":72,"meta_description":73,"meta_keywords":74,"author_signature":55,"description":75,"meta_title":76,"whats_included":77,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":834},{"live_training_course_id":803,"elearning_course_id":61},[836,869,901,975,993],{"id":837,"name":838,"description":839,"about":840,"you_will_learn":841,"prerequisites":842,"is_active":12,"modified_at":13,"course_outline":843,"created_at":844,"updated_at":845,"duration":846,"category_id":86,"order":19,"thumbnail":847,"slug":848,"old_live_courses_id":849,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":280,"category":850,"elearning_courses":854},696,"ARMv8-A and v9-A 64-bit Architecture","\u003Cp>This course covers the 64-bit ARMv8-A architecture that follows on from and offers compatibility with the earlier ARMv7-A 32-bit architecture. Examples of processors that first implemented this 64-bit architecture are the ARM Cortex-A53 and Cortex A57 processors. Since the successful introduction of the ARMv8-A architecture and products, there have been several architectural enhancements. This course includes enhancements 8.1, 8.2, 8.3, 8.4, 8.5 and 8.6. This course also covers the additions in v9-A architecture. This course concentrates on the ISA – Instruction Set Architecture, rather than the details of individual implementations.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"ARMv8-A and ARMv9-A 64-bit Architecture\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>ARM architecture (ARMv8.x-A and ARMv9.x-A)\u003C/li>\r\n\u003Cli>Support for execution of 32-bit ARMv7-A code\u003C/li>\r\n\u003Cli>64-bit ISA (registers, instruction set, system instructions, etc)\u003C/li>\r\n\u003Cli>Floating point and Neon\u003C/li>\r\n\u003Cli>Calling conventions\u003C/li>\r\n\u003Cli>Memory model and paging\u003C/li>\r\n\u003Cli>Exception and Interrupt handling, and the exception levels\u003C/li>\r\n\u003Cli>Exception Level 2, intended for virtualization support\u003C/li>\r\n\u003Cli>TrustZone overview (Secure monitor at Exception Level 3 plus secure world)\u003C/li>\r\n\u003Cli>Power management\u003C/li>\r\n\u003Cli>Debug\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cem>Note: v8-A includes compatibility support for v7-A code execution. This support is covered, but not the details of the v7-A architecture.\u003C/em>\u003C/p>","\u003Cp>Knowledge of ARMv7 32-bit Architecture and general computer architecture is recommended.\u003C/p>","\u003Cul>\r\n                \u003Cli>Introduction to ARM 64-bit Architecture\u003C/li>\r\n                \u003Cli>ARM architecture profiles, what is v8-A and the other architecture profiles\u003C/li>\r\n                \u003Cli>ARM architecture extensions to v8-A, the v8.1A, v8.2-A, etc and v9-A\u003C/li>\r\n                \u003Cli>v8-A introduction and rational\u003C/li>\r\n                \u003Cli>Support for v7 legacy code\r\n                \u003Cul>\r\n                    \u003Cli>AArch32 and AArch64 state\u003C/li>\r\n                    \u003Cli>v7 instruction set changes\r\n                    \u003Cul>\r\n                        \u003Cli>Deprecation\u003C/li>\r\n                        \u003Cli>Additional features (some new 64-bit features have also been added as new features available to 32-bit execution)\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>64-bit platform architecture overview\r\n                \u003Cul>\r\n                    \u003Cli>Sample SoC\u003C/li>\r\n                    \u003Cli>MP Core\u003C/li>\r\n                    \u003Cli>Interconnect (ACE or CHI)\r\n                    \u003Cul>\r\n                        \u003Cli>Coherency and the interconnect\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Distributed interrupt controller\u003C/li>\r\n                    \u003Cli>Role of firmware\u003C/li>\r\n                    \u003Cli>Booting\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>A64 ISA\u003C/li>\r\n                \u003Cli>Integer registers\u003C/li>\r\n                \u003Cli>Instruction set\r\n                \u003Cul>\r\n                    \u003Cli>Integer operations\u003C/li>\r\n                    \u003Cli>Memory operations\u003C/li>\r\n                    \u003Cli>Stack\u003C/li>\r\n                    \u003Cli>System instructions\r\n                    \u003Cul>\r\n                        \u003Cli>System control registers\u003C/li>\r\n                        \u003Cli>Relationship to v7 support and co-processors\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Calling conventions\u003C/li>\r\n                    \u003Cli>Memory access (DRAM and device)\r\n                    \u003Cul>\r\n                        \u003Cli>Ordering model\u003C/li>\r\n                        \u003Cli>Barriers\r\n                        \u003Cul>\r\n                            \u003Cli>dmb, dsb, isb\u003C/li>\r\n                            \u003Cli>load-acquire and store-release\u003C/li>\r\n                            \u003Cli>Domains\u003C/li>\r\n                        \u003C/ul>\r\n                        \u003C/li>\r\n                        \u003Cli>Semaphores\u003C/li>\r\n                        \u003Cli>Cache management\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Floating point, advanced SIMD, crypto\r\n                    \u003Cul>\r\n                        \u003Cli>Registers and instructions\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Exception levels\r\n                    \u003Cul>\r\n                        \u003Cli>The 4 exception levels\u003C/li>\r\n                        \u003Cli>Stack model, handler and thread\u003C/li>\r\n                        \u003Cli>Vector table\u003C/li>\r\n                        \u003Cli>Core implementation choices\u003C/li>\r\n                        \u003Cli>Switching AArch32 and AArch64 state\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Exception and interrupt handling\r\n                    \u003Cul>\r\n                        \u003Cli>Control of delivery of exceptions and interrupts\u003C/li>\r\n                        \u003Cli>Syndrome registers\u003C/li>\r\n                        \u003Cli>Switching exception levels\u003C/li>\r\n                        \u003Cli>Return from exception\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Paging\r\n                    \u003Cul>\r\n                        \u003Cli>Memory management with page tables\u003C/li>\r\n                        \u003Cli>4K, 16K and 64K granules\u003C/li>\r\n                        \u003Cli>Page sizes\u003C/li>\r\n                        \u003Cli>Features achieved with page tables, such as execute never\u003C/li>\r\n                        \u003Cli>Address space trickery – fields in pointers that are not part of the address, such as tags and pointer authentication\u003C/li>\r\n                        \u003Cli>TLB management\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>EL2 Overview\r\n                \u003Cul>\r\n                    \u003Cli>Processor features intended for virtualization\u003C/li>\r\n                    \u003Cli>Use of exception levels\u003C/li>\r\n                    \u003Cli>Memory management\r\n                    \u003Cul>\r\n                        \u003Cli>Second level page tables\u003C/li>\r\n                        \u003Cli>Memory partitioning\u003C/li>\r\n                        \u003Cli>I/O MMU (SMMU)\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>The use of EL2 for UEFI execution during boot\u003C/li>\r\n                    \u003Cli>Addition of Secure EL2 to the architecture\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Caches\r\n                \u003Cul>\r\n                    \u003Cli>Hardware cache coherency\u003C/li>\r\n                    \u003Cli>Software responsibilities\u003C/li>\r\n                    \u003Cli>Cache control in software\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Security (TrustZone)\r\n                \u003Cul>\r\n                    \u003Cli>TrustZone functionality\u003C/li>\r\n                    \u003Cli>Secure memory\u003C/li>\r\n                    \u003Cli>Links to TrustZone in other architectures\u003C/li>\r\n                    \u003Cli>32-bit or 64-bit TrustZone\u003C/li>\r\n                    \u003Cli>Implications on exception levels, and the addition of secure EL2\u003C/li>\r\n                    \u003Cli>Switching bitness of TrustZone\u003C/li>\r\n                    \u003Cli>Dynamic TrustZone, also called Realms, part of ARM’s Confidential Compute Architecture\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Other topics\r\n                \u003Cul>\r\n                    \u003Cli>Core power management, external power controller\r\n                    \u003Cul>\r\n                        \u003Cli>Power modes (dormant, shutdown)\u003C/li>\r\n                        \u003Cli>WFI, WFE, SEV\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Debug (hardware and software based debug)\u003C/li>\r\n                    \u003Cli>RAS – Reliability, Availability, Serviceability\u003C/li>\r\n                    \u003Cli>Boot process\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n            \u003C/ul>","2022-04-04T16:59:43.000000Z","2025-06-03T16:41:47.000000Z","4 or 5 days","public/live_training_courses/thumbnails/live_training_course_696_thumbnail_1748360436.png","arm-64-bit-architecture",23,{"id":86,"title":851,"created_at":852,"updated_at":853,"order":89},"ARM Architecture","2024-01-15T09:25:52.000000Z","2024-12-26T15:14:25.000000Z",[855],{"id":856,"name":857,"about":858,"instructor_fullname":139,"instructor_email":140,"price":122,"price_arbor":122,"created_at":39,"updated_at":859,"you_will_learn":860,"equivelent_of":89,"subscription_length":43,"video_id":861,"is_active":12,"prerequisites":704,"modified_at":13,"order":782,"presentation_id":862,"slug":863,"course_category_id":47,"release_date":51,"old_product_id":864,"meta_description":857,"meta_keywords":865,"author_signature":152,"description":866,"meta_title":857,"whats_included":867,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":868},1720,"ARM 64-bit Architecture (ARM v8-A) eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"ARMv8-A\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","2025-10-31T13:10:56.000000Z","\u003Cdiv>\r\n\u003Cul>\r\n\u003Cli>ARM architecture (ARMv8-A)\u003C/li>\r\n\u003Cli>Support for execution of 32-bit ARMv7-A code\u003C/li>\r\n\u003Cli>64-bit ISA (registers, instruction set, system instructions, etc)\u003C/li>\r\n\u003Cli>Floating point and Neon\u003C/li>\r\n\u003Cli>Calling conventions\u003C/li>\r\n\u003Cli>Memory and paging\u003C/li>\r\n\u003Cli>Exception and Interrupt handling, and the exception levels\u003C/li>\r\n\u003Cli>Virtualization (Exception Level 2)\u003C/li>\r\n\u003Cli>TrustZone overview (Exception Level 3)\u003C/li>\r\n\u003Cli>Power management\u003C/li>\r\n\u003Cli>Debug\u003C/li>\r\n\u003C/ul>\r\n\u003C/div>",37726,413,"arm-64-bit-architecture-arm-v8-a-elearning-course",559,"ARM 64-bit, armv8-a, v8-a, eLearning, mindshare, tutorial, training","\u003Cp>This course covers the 64-bit ARMv8-A architecture that follows on from and offers compatibility with the earlier ARMv7-A 32-bit architecture. Examples of processors that first implemented this 64-bit architecture are the ARM Cortex-A53 and Cortex A57 processors. Since the successful introduction of the ARMv8-A architecture and products, there have been several architectural enhancements. \u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/armv8a_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/armv8a_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>ARMv8-A eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":837,"elearning_course_id":856},{"id":870,"name":871,"description":872,"about":873,"you_will_learn":874,"prerequisites":875,"is_active":12,"modified_at":13,"course_outline":876,"created_at":877,"updated_at":878,"duration":326,"category_id":86,"order":42,"thumbnail":879,"slug":880,"old_live_courses_id":881,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":13,"category":882,"elearning_courses":883},713,"ARM 64-bit Server Architecture","\u003Cp>This course describes the architecture of ARM’s 64-bit processors and SoC architecture. Examples of SoCs that implement this 64-bit architecture are the ARM Cortex-A53 and Cortex A57 processors. The courses covers the ISA (Instruction Set Architecture) details, pipeline information for some implementations of the v8A architecture, interconnect details, cache management, and power management.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"ARM 64-bit Server Architecture\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>ARM architecture (ARMv8-A and v9-A)\u003C/li>\r\n\u003Cli>64-bit ISA (registers, instruction set etc)\u003C/li>\r\n\u003Cli>Memory and paging architecture\u003C/li>\r\n\u003Cli>Exception and Interrupt handling\u003C/li>\r\n\u003Cli>Pipeline implementations\u003C/li>\r\n\u003Cli>Cache management\u003C/li>\r\n\u003Cli>System interconnects\u003C/li>\r\n\u003Cli>Power management\u003C/li>\r\n\u003Cli>Server specific SoC features\u003C/li>\r\n\u003C/ul>","\u003Cp>Knowledge of ARMv7 32-bit architecture is recommended.\u003C/p>","\u003Cul>\r\n\u003Cli>Introduction to ARM 64-bit Architecture\u003C/li>\r\n\u003Cli>ARM architecture profiles, what is v8-A and v9-A\u003C/li>\r\n\u003Cli>v8-A introduction and rational\u003C/li>\r\n\u003Cli>Support for v7 legacy code\u003C/li>\r\n\u003Cli>64-bit platform architecture overview\u003Cbr>\r\n\u003Cul>\r\n\u003Cli>Sample SoC\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>A64 ISA introduction\u003C/li>\r\n\u003Cli>Integer registers\u003C/li>\r\n\u003Cli>Instruction set\r\n\u003Cul>\r\n\u003Cli>Integer operations\u003C/li>\r\n\u003Cli>Memory operations\u003C/li>\r\n\u003Cli>Stack\u003C/li>\r\n\u003Cli>System instructions\r\n\u003Cul>\r\n\u003Cli>System control registers\u003C/li>\r\n\u003Cli>Relationship to v7 support and co-processors\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Calling conventions\u003C/li>\r\n\u003Cli>Memory access (DRAM and device)\r\n\u003Cul>\r\n\u003Cli>Memory mapped access to devices\u003C/li>\r\n\u003Cli>Memory types\u003C/li>\r\n\u003Cli>Ordering model\u003C/li>\r\n\u003Cli>Barriers\r\n\u003Cul>\r\n\u003Cli>dmb, dsb, isb\u003C/li>\r\n\u003Cli>load-acquire and store-release\u003C/li>\r\n\u003Cli>Domains\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Semaphores\u003C/li>\r\n\u003Cli>Cache management\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Floating point, advanced SIMD, crypto\r\n\u003Cul>\r\n\u003Cli>Registers and instructions\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Exception levels\r\n\u003Cul>\r\n\u003Cli>The 4 exception levels\u003C/li>\r\n\u003Cli>Stack model, handler and thread\u003C/li>\r\n\u003Cli>Vector table\u003C/li>\r\n\u003Cli>Core implementation choices\u003C/li>\r\n\u003Cli>Switching AArch32 and AArch64 state\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Exception and interrupt handling\r\n\u003Cul>\r\n\u003Cli>Control of delivery of exceptions and interrupts\u003C/li>\r\n\u003Cli>Syndrome registers\u003C/li>\r\n\u003Cli>Switching exception levels\u003C/li>\r\n\u003Cli>Return from exception\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Paging\r\n\u003Cul>\r\n\u003Cli>Page tables\u003C/li>\r\n\u003Cli>4K, 16K and 64K granules\u003C/li>\r\n\u003Cli>Page sizes, support for large pages\u003C/li>\r\n\u003Cli>TLB management\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Caches\r\n\u003Cul>\r\n\u003Cli>Cache architecture\u003C/li>\r\n\u003Cli>Multiple cache levels\u003C/li>\r\n\u003Cli>Instruction and data/unified caches\u003C/li>\r\n\u003Cli>Hardware cache coherency, MP Core and multi-cluster\u003C/li>\r\n\u003Cli>Shareability domains\u003C/li>\r\n\u003Cli>I/O cache coherency\u003C/li>\r\n\u003Cli>Software responsibilities\u003C/li>\r\n\u003Cli>Cache control\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Security (TrustZone)\r\n\u003Cul>\r\n\u003Cli>Trustzone overview\u003C/li>\r\n\u003Cli>Switching bitness of TrustZone between 32-bit and 64-bit\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Virtualization overview\u003C/li>\r\n\u003Cli>ARM Piplelines\r\n\u003Cul>\r\n\u003Cli>Cortex-A57\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Interconnects and multi-core support\r\n\u003Cul>\r\n\u003Cli>MP Core\u003C/li>\r\n\u003Cli>Role of the interconnect\u003C/li>\r\n\u003Cli>Cache oherency and the interconnect\u003C/li>\r\n\u003Cli>DVM and the interconnect\u003C/li>\r\n\u003Cli>Role of the interconnect in memory ordering models\u003C/li>\r\n\u003Cli>CHI\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Interrupt architectures\r\n\u003Cul>\r\n\u003Cli>Interrupt delivery across multiple cores\u003C/li>\r\n\u003Cli>Software generated interrupts\u003C/li>\r\n\u003Cli>Interrupt controller\u003C/li>\r\n\u003Cli>Memory mapped interrupts\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Firmware\r\n\u003Cul>\r\n\u003Cli>Booting\u003C/li>\r\n\u003Cli>UEFI overview\u003C/li>\r\n\u003Cli>ACPI overview\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>PCIe support\r\n\u003Cul>\r\n\u003Cli>Bridge to PCIe\u003C/li>\r\n\u003Cli>Interrupt delivery\u003C/li>\r\n\u003Cli>Configuration space\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Other topics\r\n\u003Cul>\r\n\u003Cli>Core power management, power controller\r\n\u003Cul>\r\n\u003Cli>Power modes (dormant, shutdown)\u003C/li>\r\n\u003Cli>WFI, WFE, SEV\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Server reliability features, ECC protection, error reporting\u003C/li>\r\n\u003Cli>Debug\u003C/li>\r\n\u003Cli>Linaro\u003C/li>\r\n\u003Cli>64-bit tool chain overview\u003C/li>\r\n\u003Cli>64-bit Linux overview\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"text-decoration: underline;\">\u003Cem>Optional Topics (Not covered in standard 4-day course)\u003C/em>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>32-bit v7 Architecture Overview (1-day)\r\n\u003Cul>\r\n\u003Cli>Overview of 32-bit v7 ISA (registers, instruction set, etc.)\u003C/li>\r\n\u003Cli>Memory and Paging architecture overview\u003C/li>\r\n\u003Cli>Interrupt handling and exception overview\u003C/li>\r\n\u003Cli>Floating Point, TrustZone and NEON overview\u003C/li>\r\n\u003Cli>Example 32-bit processor pipeline overview\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Additional 64-bit ISA material not covered in standard 4-day course (1 day)\u003C/li>\r\n\u003Cli>ARM processor virtualization support (1-day)\r\n\u003Cul>\r\n\u003Cli>Processor mode (Hyp mode, EL2) added in 32-bit ARM to implement hardware virtualization of the processor core\u003C/li>\r\n\u003Cli>The intersection of virtualization support and security support (TrustZone)\u003C/li>\r\n\u003Cli>ARM 64-bit processor virtualization implementation – Exception Levels 2 and 3\u003C/li>\r\n\u003Cli>Interrupts and Virtualization\u003C/li>\r\n\u003Cli>Memory management\u003C/li>\r\n\u003Cli>Paravirtualization techniques\u003C/li>\r\n\u003Cli>Hardware support for paging guest operating systems\u003C/li>\r\n\u003Cli>Significance of guest physical (intermediate physical address space), especially with regard to I/O\u003C/li>\r\n\u003Cli>The SMMU\u003C/li>\r\n\u003Cli>TLB management and TLB features to support virtualization\u003C/li>\r\n\u003Cli>IO Virtualization\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>","2019-03-14T15:21:04.000000Z","2025-05-27T15:40:54.000000Z","public/live_training_courses/thumbnails/live_training_course_713_thumbnail_1748360454.png","arm-64-bit-server-architecture",77,{"id":86,"title":851,"created_at":852,"updated_at":853,"order":89},[884,886],{"id":856,"name":857,"about":858,"instructor_fullname":139,"instructor_email":140,"price":122,"price_arbor":122,"created_at":39,"updated_at":859,"you_will_learn":860,"equivelent_of":89,"subscription_length":43,"video_id":861,"is_active":12,"prerequisites":704,"modified_at":13,"order":782,"presentation_id":862,"slug":863,"course_category_id":47,"release_date":51,"old_product_id":864,"meta_description":857,"meta_keywords":865,"author_signature":152,"description":866,"meta_title":857,"whats_included":867,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":885},{"live_training_course_id":870,"elearning_course_id":856},{"id":887,"name":888,"about":889,"instructor_fullname":139,"instructor_email":140,"price":890,"price_arbor":890,"created_at":39,"updated_at":891,"you_will_learn":892,"equivelent_of":42,"subscription_length":43,"video_id":893,"is_active":12,"prerequisites":164,"modified_at":13,"order":19,"presentation_id":894,"slug":895,"course_category_id":47,"release_date":129,"old_product_id":896,"meta_description":888,"meta_keywords":897,"author_signature":152,"description":898,"meta_title":888,"whats_included":899,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":900},1739,"Fundamentals of ARM Architecture eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"ARM Architecture\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","195","2025-10-31T13:12:37.000000Z","\u003Cul>\r\n\u003Cli>Variety of ARM processors\u003C/li>\r\n\u003Cli>Terminology\u003C/li>\r\n\u003Cli>32-bit and 64-bit architectures\u003C/li>\r\n\u003Cli>System buses\u003C/li>\r\n\u003Cli>Software development environment\u003C/li>\r\n\u003C/ul>",37745,471,"fundamentals-of-arm-architecture",685,"arm, elearning","\u003Cp>This fundamentals course is a great start for any hardware or software engineer looking to get a base understanding of the ARM architecture. Topics range from the ARM instruction sets, processor modes, architecture profiles, instruction pipelines, bus interfaces, software development environments and much more.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/armfund_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/armfund_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>ARM eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":870,"elearning_course_id":887},{"id":902,"name":903,"description":904,"about":905,"you_will_learn":906,"prerequisites":45,"is_active":12,"modified_at":13,"course_outline":907,"created_at":908,"updated_at":909,"duration":326,"category_id":86,"order":146,"thumbnail":910,"slug":911,"old_live_courses_id":591,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":13,"category":912,"elearning_courses":913},695,"ARMv7-A and v8-A Architecture","\u003Cp>ARM processors are at the heart of many mobile phones, digital cameras, and other small portable devices. One characteristic of the processor that leads to this wide use is the low power consumption – a critical factor when battery life is a key product requirement. ARM processors are also heavily used in embedded control applications. As the mobile phone has evolved into an internet device with the tasks more typically associated with a PC (web browsing, media playback, etc), the processing capability has grown, such that the “simple” phone processor is now a much more capable device, a multiple core device that has the capability to move into the data center. This class looks at the range of processors comprising the ARMv7 architecture and the ARMv8 64-bit architecture, how the processors across the range are similar yet target different markets, and compare the architecture with Intel’s IA-32 architecture.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"ARMv7-A and v8-A Architecture\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>ARM architecture: ARMv7 (32-bit) and ARMv8 (64-bit) architectures, along with some of the history\u003C/li>\r\n\u003Cli>ARM microarchitecture, the internals of some of the different processors comprising the Cortex family\u003C/li>\r\n\u003Cli>Comparisons and contrasts with the x86 architecture and microarchitectures\u003C/li>\r\n\u003Cli>Buses connecting the processor core(s) to the rest of the system\u003C/li>\r\n\u003Cli>Numerous examples of how this is used in SoC (System on a Chip) designs\u003C/li>\r\n\u003Cli>The ARM business and licensing model, and how this leads to a variety of devices\u003C/li>\r\n\u003C/ul>","\u003Cul>\r\n\u003Cli>Software Architecture\r\n\u003Cul>\r\n\u003Cli>Architecture Profiles and their significance – Application (e.g. Cortex-A15), Embedded (e.g. Cortex-R4), and Microcontroller (e.g. Cortex-M4)\u003C/li>\r\n\u003Cli>Instruction sets and environments (AArch32 - ARM, Thumb, ThumbEE, and AArch64)\u003C/li>\r\n\u003Cli>Version 7 registers, and the banking of the registers.\u003C/li>\r\n\u003Cli>Version 8 registers; support for version 7 execution modes.\u003C/li>\r\n\u003Cli>Version 7 privileges, modes and states.\u003C/li>\r\n\u003Cli>Version 8 exception model.\u003C/li>\r\n\u003Cli>Memory and IO access, and system control.\u003C/li>\r\n\u003Cli>Memory ordering model, and software control.\u003C/li>\r\n\u003Cli>Architectural extensions – Vector Floating Point, SIMD (Neon), security (Trust Zone), virtualization.\u003C/li>\r\n\u003Cli>Interrupts and Exceptions.\u003C/li>\r\n\u003Cli>Memory protection and paging mechanisms, including v7 page tables, support for large physical address space (>4 GBytes), and the 64-bit version 8 page tables.\u003C/li>\r\n\u003Cli>Caches, TLBs and branch prediction\u003C/li>\r\n\u003Cli>Multiprocessing extensions\u003C/li>\r\n\u003Cli>Implementation specific issues\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Processor Core Microarchitecture\r\n\u003Cul>\r\n\u003Cli>Pipeline overview\r\n\u003Cul>\r\n\u003Cli>Version 7 application processors (A8, A9, A5, A15, A7)\u003C/li>\r\n\u003Cli>Version 8 processors A57 and A53\u003C/li>\r\n\u003Cli>Realtime processors (R4)\u003C/li>\r\n\u003Cli>Microcontroller processors (M0, M3)\u003C/li>\r\n\u003Cli>Single core and MP-Core blocks (the non-processor functionality).\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Impacts of the different implementations on software, issues such as predictability\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>System Architecture\r\n\u003Cul>\r\n\u003Cli>Sample SoC (System on a Chip) designs.\u003C/li>\r\n\u003Cli>The busses (AMBA)\r\n\u003Cul>\r\n\u003Cli>AXI version 3.\u003C/li>\r\n\u003Cli>AXI version 4 – ACE (Advanced Coherency Extensions).\u003C/li>\r\n\u003Cli>Multiple MP-Core clusters connected using ACE.\u003C/li>\r\n\u003Cli>APB.\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Power management\u003C/li>\r\n\u003Cli>Debug\u003C/li>\r\n\u003Cli>Trace\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Comparison of ARM and IA-32 (x86)\r\n\u003Cul>\r\n\u003Cli>Similarities and differences in the architectures, and the significance\u003C/li>\r\n\u003Cli>Comparisons with Intel in-order and out-of-order pipelines\u003C/li>\r\n\u003Cli>Business models differences, leading to a variety of devices\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>","2019-03-14T15:24:50.000000Z","2025-05-30T16:18:09.000000Z","public/live_training_courses/thumbnails/live_training_course_695_thumbnail_1748360399.png","armv7a-v8a-architecture",{"id":86,"title":851,"created_at":852,"updated_at":853,"order":89},[914,928,944,959,973],{"id":915,"name":916,"about":917,"instructor_fullname":139,"instructor_email":140,"price":692,"price_arbor":692,"created_at":39,"updated_at":918,"you_will_learn":919,"equivelent_of":86,"subscription_length":43,"video_id":920,"is_active":12,"prerequisites":704,"modified_at":13,"order":658,"presentation_id":921,"slug":922,"course_category_id":47,"release_date":129,"old_product_id":923,"meta_description":916,"meta_keywords":924,"author_signature":152,"description":925,"meta_title":916,"whats_included":926,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":927},1711,"ARM 32-bit Architecture (ARM v7) eLearning Course","\u003Cdiv>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"ARMv7\" to Life for You\u003C/strong>\u003C/span>\u003C/div>","2025-07-31T15:11:54.000000Z","\u003Cp>The ARM 32-bit Architecture eLearning course focuses on software-related aspects of the ARMv7 Architecture, with a specific focus on Cortex-A and Cortex-R profiles, plus common subjects like software tools. This course is aimed at embedded software and systems developers who would like to acquire a broad knowledge of ARM technology with a bias toward application processors and real-time processors.\u003C/p>",37717,371,"arm-32-bit-architecture-arm-v7-elearning-course",479,"ARM Accredited Engineer eLearning Course","\u003Cp>This was the only eLearning course endorsed by ARM for anyone wanting to take the ARM Accredited Engineer (AAE) certification exam when ARM was still offering their AAE certification program. That program has been discontinued by ARM, but the information in this course is still very relevant and extremely valuable for anyone working with ARM v7 architectures.\u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(108, 108, 108); font-size: 18px; font-weight: bold;\"> \u003C/span>\u003C/p>\r\n\u003Cp>\u003Cspan class=\"sectionsubhead\">ARM Endorsement\u003C/span>\u003C/p>\r\n\u003Cp style=\"padding-left: 40px;\">\u003Cem>“On the strength of MindShare’s position as an industry leader in technology training, particularly in the area of microprocessor architecture, we were happy to welcome them to the AAE program as an ARM Accreditation Training Partner (AATP). Their expertise in delivering engaging self-paced eLearning courses should make MindShare's ARM Accredited Engineer Certification eLearning course a very good way to efficiently and cost-effectively prepare for the ARM Accredited Engineer (AAE) exam”.\u003C/em>\u003Cbr>\u003Cstrong>- Daniel Dearing, AAE Program Manager\u003C/strong>\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/arm_modules%20%281%29.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/armv7_full_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>ARMv7 eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":902,"elearning_course_id":915},{"id":929,"name":930,"about":931,"instructor_fullname":139,"instructor_email":139,"price":890,"price_arbor":890,"created_at":39,"updated_at":932,"you_will_learn":933,"equivelent_of":207,"subscription_length":43,"video_id":934,"is_active":696,"prerequisites":697,"modified_at":13,"order":935,"presentation_id":936,"slug":937,"course_category_id":47,"release_date":938,"old_product_id":939,"meta_description":940,"meta_keywords":941,"author_signature":152,"description":931,"meta_title":704,"whats_included":942,"evaluation_id":13,"vector_store_id":13,"ai_assistant_id":13,"pivot":943},1733,"ARM v8-A (64-bit) Pipelines eLearning Course","\u003C!DOCTYPE html PUBLIC \"-//W3C//DTD HTML 4.0 Transitional//EN\" \"http://www.w3.org/TR/REC-html40/loose.dtd\">\r\n\u003Chtml>\u003Cbody>\u003Cp>\u003Cspan style=\"color: rgb(108, 108, 108); font-size: 18px; font-weight: bold;\">ARM v8-A (64-bit) Pipelines eLearning Course Info\u003C/span>\u003C/p>\r\n\r\n\r\n\r\n\u003Cdiv style=\"padding: 12px; width: 580px; background-image: url(http://www.mindshare.com/images/lb-horiz-fade.gif); background-repeat: repeat-y; color: rgb(84, 100, 104); font-size: 10px;\">\r\n\r\n\u003C/div>\u003C/body>\u003C/html>","2025-08-21T17:08:29.000000Z","\u003Cp>.\u003C/p>",37739,59,449,"arm-v8-a-64-bit-pipelines-elearning-course","2024-11-14 04:48:50",635,"ARMv8-A (64-bit) pipelines elearning course","armv8-a, 64-bit processor, pipelines, cortex-a57, cortex-a72, cortex-a53, appliedmicro x-gene, training, tutorial","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/armpipe_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/armpipe_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>ARM v8-A Pipelines eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 90 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":902,"elearning_course_id":929},{"id":945,"name":946,"about":858,"instructor_fullname":139,"instructor_email":140,"price":376,"price_arbor":376,"created_at":39,"updated_at":947,"you_will_learn":948,"equivelent_of":42,"subscription_length":43,"video_id":949,"is_active":12,"prerequisites":704,"modified_at":13,"order":950,"presentation_id":951,"slug":952,"course_category_id":47,"release_date":129,"old_product_id":953,"meta_description":954,"meta_keywords":955,"author_signature":152,"description":956,"meta_title":954,"whats_included":957,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":958},1714,"Fundamentals of ARMv8-A eLearning Course","2025-10-31T13:10:15.000000Z","\u003Cul>\r\n\u003Cli>Basics of ARMv8-A\u003C/li>\r\n\u003C/ul>",37720,80,377,"fundamentals-of-armv8-a-elearning-course",501,"Fundamentals of ARMv8-A Architecture eLearning course","armv8-a, arm 64-bit, mindshare, elearning","\u003Cdiv>This course is a subset of MindShare's course \u003Ca href=\"../../eLearning/Course/Comprehensive_ARM_Architecture_eLearning_Course\">\u003Cu>Comprehensive ARM Architecture\u003C/u>\u003C/a>. Modules 15-21 of that course have been extracted and offered here as a standalone course covering the basics of ARM's 64-bit architecture for the -A profile, often referred to as ARMv8.\u003C/div>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/armv8_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/armv8_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>ARM eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":902,"elearning_course_id":945},{"id":960,"name":961,"about":889,"instructor_fullname":139,"instructor_email":140,"price":83,"price_arbor":962,"created_at":39,"updated_at":963,"you_will_learn":964,"equivelent_of":89,"subscription_length":43,"video_id":965,"is_active":12,"prerequisites":164,"modified_at":13,"order":812,"presentation_id":966,"slug":967,"course_category_id":47,"release_date":129,"old_product_id":70,"meta_description":968,"meta_keywords":969,"author_signature":152,"description":970,"meta_title":961,"whats_included":971,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":972},1713,"ARM Architecture eLearning Course","0","2025-10-31T13:10:28.000000Z","\u003Cdiv>\r\n\u003Cul>\r\n\u003Cli>ARM architecture: ARMv7 (32-bit) and ARMv8 (64-bit) architectures, along with some of the history\u003C/li>\r\n\u003Cli>ARM microarchitecture, the internals of some of the different processors comprising the Cortex family\u003C/li>\r\n\u003Cli>Comparisons and contrasts with the Intel IA-32 architecture and microarchitectures\u003C/li>\r\n\u003Cli>Buses connecting the processor core(s) to the rest of the system\u003C/li>\r\n\u003Cli>Numerous examples of how this is used in SoC (System on a Chip) designs\u003C/li>\r\n\u003Cli>The ARM business and licensing model, and how this leads to a variety of devices\u003C/li>\r\n\u003C/ul>\r\n\u003C/div>",37719,375,"comprehensive-arm-architecture-elearning-course","ARM elearning","ARM, processor, architecture, elearning, online, training, tutorial","\u003Cp>ARM processors are at the heart of many mobile phones, digital cameras, and other small portable devices. One characteristic of the processor that leads to this wide use is the low power consumption – a critical factor when battery life is a key product requirement. ARM processors are also heavily used in embedded control applications. As the mobile phone has evolved into an internet device with the tasks more typically associated with a PC (web browsing, media playback, etc), the processing capability has grown, such that the “simple” phone processor is now a much more capable device, a multiple core device that has the capability to move into the data center. This class looks at the range of processors comprising the ARMv7 architecture and the upcoming ARMv8 64-bit architecture, how the processors across the range are similar yet target different markets, and compare the architecture with Intel’s IA-32 architecture.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/arm_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/arm_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>ARM eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":902,"elearning_course_id":960},{"id":856,"name":857,"about":858,"instructor_fullname":139,"instructor_email":140,"price":122,"price_arbor":122,"created_at":39,"updated_at":859,"you_will_learn":860,"equivelent_of":89,"subscription_length":43,"video_id":861,"is_active":12,"prerequisites":704,"modified_at":13,"order":782,"presentation_id":862,"slug":863,"course_category_id":47,"release_date":51,"old_product_id":864,"meta_description":857,"meta_keywords":865,"author_signature":152,"description":866,"meta_title":857,"whats_included":867,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":974},{"live_training_course_id":902,"elearning_course_id":856},{"id":976,"name":977,"description":978,"about":979,"you_will_learn":980,"prerequisites":45,"is_active":12,"modified_at":13,"course_outline":981,"created_at":982,"updated_at":983,"duration":183,"category_id":86,"order":86,"thumbnail":984,"slug":985,"old_live_courses_id":986,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":280,"category":987,"elearning_courses":988},714,"ARMv7 32-bit Architecture","\u003Cp>The ARMv7 32-bit Architecture course focuses on software-related aspects of the ARMv7 Architecture, with a specific focus on Cortex-A and Cortex-R profiles, plus common subjects like software tools. This course is aimed at embedded software and systems developers who would like to acquire a broad knowledge of ARM technology with a bias toward application processors and real-time processors.\u003C/p>\r\n\u003Cp>\u003Cbr>\u003Cbr>This course was endorsed by ARM for anyone wanting to take the ARM Accredited Engineer (AAE) certification exam when ARM was still offering their AAE certification program. That program has been discontinued by ARM, but the information in this course is still very relevant and extremely valuable for anyone working with ARM v7 architectures.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan class=\"sectionsubhead\">\u003Cspan style=\"text-decoration: underline;\">\u003Cstrong>ARM Endorsement\u003C/strong>\u003C/span>\u003Cbr>\u003C/span>\u003C/p>\r\n\u003Cp>\u003Cem>\"On the strength of MindShare’s position as an industry leader in technology training, particularly in the area of microprocessor architecture, we were happy to welcome them to the AAE program as an ARM Accreditation Training Partner (AATP). Their expertise in delivering engaging self-paced eLearning courses should make MindShare's ARM Accredited Engineer Certification eLearning course a very good way to efficiently and cost-effectively prepare for the ARM Accredited Engineer (AAE) exam.\"\u003C/em>\u003C/p>\r\n\u003Cp>\u003Cstrong>- Daniel Dearing, AAE Program Manager\u003C/strong>\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>\u003Cspan class=\"sectionsubhead\">Let MindShare Bring \"ARMv7 32-bit Architecture\" to Life for You\u003C/span>\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>ARM processor architecture (v5, v6, v7, v8)\u003C/li>\r\n\u003Cli>ARM architecture registers\u003C/li>\r\n\u003Cli>ARM instructions and syntax\u003C/li>\r\n\u003Cli>Interrupt handling environment\u003C/li>\r\n\u003Cli>Memory architecture, paging and caches\u003C/li>\r\n\u003Cli>ARM virtualization\u003C/li>\r\n\u003Cli>About various ARM processor flavors (-M, -A, -R)\u003C/li>\r\n\u003Cli>AMBA buses\u003C/li>\r\n\u003Cli>Boot processes\u003C/li>\r\n\u003Cli>Software development and code optimization\u003C/li>\r\n\u003C/ul>","\u003Cul>\r\n\u003Cli>ARM Introduction\r\n\u003Cul>\r\n\u003Cli>Intro to ARM the company\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Sample SoCs and Multiple Processor Cores\r\n\u003Cul>\r\n\u003Cli>Descriptions of several common ARM-based SoCs and goes over the concepts of multiple cores and multi-processing (SMP vs. AMP)\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>ARM Processor Architectures\r\n\u003Cul>\r\n\u003Cli>ARM architecture evolution (v5, v6, v7 and v8) as well as the architecture profiles (-A, -R and -M)\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Architecture Introduction\r\n\u003Cul>\r\n\u003Cli>Overview of the instruction sets supported and introduces the concepts of privilege levels and exception levels\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Integer Registers\r\n\u003Cul>\r\n\u003Cli>Integer registers of the ARM architecture, the purpose and behavior of register banking and the Program Status Register\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Instructions - ARM\r\n\u003Cul>\r\n\u003Cli>ARM assembler syntax, numerous data processing instructions including some on bit manipulation as well as saturation effects\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Instructions - ARM\r\n\u003Cul>\r\n\u003Cli>Branch, conditional branch and branch/link instructions as well as how condition codes on instructions behave\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Instructions - Thumb/2, Jazelle, VZP and Neon\r\n\u003Cul>\r\n\u003Cli>Differences between ARM and Thumb/Thumb2 instructions and then goes through several examples of conditional execution in Thumb (If/Then/Else); Jazelle, Vector Floating Point and Neon instructions are also discussed at a high level\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Memory Accesses\r\n\u003Cul>\r\n\u003Cli>Alignment of memory accesses, endianness and numerous LDR/STR addressing examples including a discussion on pre- versus post-indexing; memory copy examples are also covered\u003C/li>\r\n\u003Cli>Supported memory types and then goes through access ordering, several memory barrier examples, a semaphore synchronization example as well as the behavior of self-modifying code; Shareability domains are also covered\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Privilege, Modes, State, TrustZone and more\r\n\u003Cul>\r\n\u003Cli>Privilege Levels, the basic processor modes, provides an overview of TrustZone, the implemented virtualization extensions, and the concept of coprocessors\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Exceptions and Interrupts\r\n\u003Cul>\r\n\u003Cli>Exceptions and interrupts including some info on common interrupt controllers\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Memory Management and Protection\r\n\u003Cul>\r\n\u003Cli>Memory management behavior typical in the -M profile as well as the memory protection scheme commonly used in the -R profile\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Paging\r\n\u003Cul>\r\n\u003Cli>Introduction to managing and protecting memory using paging (typical in -A profile), includes a discussion of TLBs and their management\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>v7 LPAE and Hardware Virtualization\r\n\u003Cul>\r\n\u003Cli>Implementation of large physical addresses in the v7 architecture as well as the affects of hardware virtualization on paging\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Debug and Analysis Support\r\n\u003Cul>\r\n\u003Cli>Different levels of debug that can be used and how each works\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Caches\r\n\u003Cul>\r\n\u003Cli>Caching, including cache line states, coherency and cache policies; Then shows Cortex-A9 caches as an example\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>The Different Processor Cores\r\n\u003Cul>\r\n\u003Cli>Overview of some of the older ARM processor families, including descriptions of their instruction pipelines\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Cortex-M0/1/3/4 and Cortex-R4/5\r\n\u003Cul>\r\n\u003Cli>Feature set and instruction pipelines of the Cortex-M0, Cortex-M0+, Cortex-M3/-M4 as well as the Cortex-R4 and Cortex-R5\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Cortex-A8/9/5\r\n\u003Cul>\r\n\u003Cli>Feature set and instruction pipelines of the Cortex-A8, Cortex-A9 and Cortex-A5\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Cortex-A15/7/12\r\n\u003Cul>\r\n\u003Cli>Feature set and instruction pipelines of the Cortex-A15, Cortex-A7 and Cortex-A12\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>AMBA - The Buses\r\n\u003Cul>\r\n\u003Cli>AMBA 3, AMBA 4 as well as AXI and the coherency extensions added to this interconnect\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Power Management and Booting\r\n\u003Cul>\r\n\u003Cli>Intro to power management on ARM-based systems as well as a generic boot process\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Software Development\r\n\u003Cul>\r\n\u003Cli>Overview of the software development process which includes a discussion of the purposes of the compiler and linker as well as object files, libraries (static vs dynamic) and the ARM ABI (Application Binary Interface)\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Software Optimization\r\n\u003Cul>\r\n\u003Cli>Optimization as well as the order of effort applied for code optimization; Includes topics such as: pointer aliasing, loop termination, parameter passing, compiler options, inline examples, variable types, data layout and packing of structures, base pointer optimization and more. Also briefly touches on some profiling tools and what they are useful for.\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>","2019-03-14T15:21:19.000000Z","2025-06-03T16:42:32.000000Z","public/live_training_courses/thumbnails/live_training_course_714_thumbnail_1748360469.png","armv7-32-bit-architecture",81,{"id":86,"title":851,"created_at":852,"updated_at":853,"order":89},[989,991],{"id":915,"name":916,"about":917,"instructor_fullname":139,"instructor_email":140,"price":692,"price_arbor":692,"created_at":39,"updated_at":918,"you_will_learn":919,"equivelent_of":86,"subscription_length":43,"video_id":920,"is_active":12,"prerequisites":704,"modified_at":13,"order":658,"presentation_id":921,"slug":922,"course_category_id":47,"release_date":129,"old_product_id":923,"meta_description":916,"meta_keywords":924,"author_signature":152,"description":925,"meta_title":916,"whats_included":926,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":990},{"live_training_course_id":976,"elearning_course_id":915},{"id":960,"name":961,"about":889,"instructor_fullname":139,"instructor_email":140,"price":83,"price_arbor":962,"created_at":39,"updated_at":963,"you_will_learn":964,"equivelent_of":89,"subscription_length":43,"video_id":965,"is_active":12,"prerequisites":164,"modified_at":13,"order":812,"presentation_id":966,"slug":967,"course_category_id":47,"release_date":129,"old_product_id":70,"meta_description":968,"meta_keywords":969,"author_signature":152,"description":970,"meta_title":961,"whats_included":971,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":992},{"live_training_course_id":976,"elearning_course_id":960},{"id":994,"name":995,"description":996,"about":997,"you_will_learn":998,"prerequisites":45,"is_active":12,"modified_at":13,"course_outline":999,"created_at":1000,"updated_at":1001,"duration":183,"category_id":86,"order":89,"thumbnail":1002,"slug":1003,"old_live_courses_id":1004,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":280,"category":1005,"elearning_courses":1006},715,"ARM MCU Architecture","\u003Cp>The ARM MCU Architecture course focuses on software aspects of the ARMv6-M and ARMv7-M Architecture profiles (Cortex-M). This course is aimed at embedded software and systems developers who wish to acquire a broad knowledge of ARM technology with a bias toward the microcontroller market.\u003Cbr>\u003Cbr>This course was endorsed by ARM for anyone wanting to take the ARM MCU Certification exam when ARM was still offering their AAME certification program (AAME - ARM Approved MCU Engineer). That program has been discontinued by ARM, but the information in this course is still very relevant and extremely valuable for anyone working with ARM microcontrollers.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>\u003Cspan class=\"sectionsubhead\">Let MindShare Bring \"ARM MCU Architecture\" to Life for You\u003C/span>\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>ARM processor architecture (M0/M0+/M3/M4)\u003C/li>\r\n\u003Cli>ARM architecture v6-M/v7-M registers\u003C/li>\r\n\u003Cli>ARM instructions, syntax and assembly language programming\u003C/li>\r\n\u003Cli>Interrupt handling environment\u003C/li>\r\n\u003Cli>v6-M/v7-M memory model and protection\u003C/li>\r\n\u003Cli>Embedded software development and C/C++ compiler hints\u003C/li>\r\n\u003Cli>Cortex-M test and debug\u003C/li>\r\n\u003C/ul>","\u003Cul>\r\n\u003Cli>ARM Introduction\r\n\u003Cul>\r\n\u003Cli>Discusses the contents of the course and provides an intro to ARM the company\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>Cortex-M3 / M4 Overview (v7-M)\r\n\u003Cul>\r\n\u003Cli>Cortex-M3 / M4 block diagram, feature set, M-Profile instructions and cycle counting\u003C/li>\r\n\u003Cli>Overview of register set, processor pipeline, memory map, bit-banding, modes, privileges, stacks, interrupts and exceptions, power management, implementation options\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>Cortex-M0 / M0+ Overview (v6-M)\r\n\u003Cul>\r\n\u003Cli>Overview of register set, processor pipeline, memory map, interrupts and exceptions, power management, RTL configuration options, debug options, system interfaces\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>Tools Overview for ARM Microcontrollers\r\n\u003Cul>\r\n\u003Cli>Keil MDK components, ULINK debug adapters, development boards, DSTREAM debug and trace unit, fast models, ARM tools licensing, legacy tools: RVDS, RVI, RVT(2), MPS\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>ARMv6-M and ARMv7-M Programmers' Model\r\n\u003Cul>\r\n\u003Cli>Integer register set, Cortex-M4 FP extensions, Program Counter (PC), Link Register (LR), Stack Pointer (SP), v7M and v6M Program Status Register (PSR), Privileged vs unprivileged execution, exception handling, v7M vs v6M instruction set, instruction classes: branch instructions, data processing instructions, load and store instructions, status register access instructions, and more, conditional execution\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>CMSIS (Cortex Microcontroller Software Interface Standard)\r\n\u003Cul>\r\n\u003Cli>CMSIS structure, CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS, CMSIS-SVD, CMSIS-Pack, CMSIS-Driver, CMSIS-DAP \u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>Cortex-M3 / M4 Microarchitecture\r\n\u003Cul>\r\n\u003Cli>Processor block diagram, pipeline details (fetch, decode, execute), several pipeline examples with instructions, instruction folding, LDR and STR examples, write buffer\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>Cortex-M0 Microarchitecture\r\n\u003Cul>\r\n\u003Cli>Processor block diagram, prefetch buffer, hardware multiplier, pipeline details, several pipeline examples with instructions, execution determinism, instruction cycle timing\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>Cortex-M0+ Microarchitecture\r\n\u003Cul>\r\n\u003Cli>Processor block diagram, prefetch buffer, hardware multiplier, pipeline details, several pipeline examples with instructions, IO Port, execution determinism, instruction cycle timing\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>Assembler Programming for ARMv7-M Processors\r\n\u003Cul>\r\n\u003Cli>Instruction set basics, Unified Assembler Language (UAL), assembly file explanation, numerous C to assembly examples, operand options\u003C/li>\r\n\u003Cli>Multiply, divide, bit manipulations, memory accesses, pre- vs. post-indexing, using the stack, If-Then blocks, condition codes and flags, exclusive access instructions, multi-thread mutex, power management instructions, Thumb-2 improvements, converting legacy assembler\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>ARMv7-M Memory Model\r\n\u003Cul>\r\n\u003Cli>System address map, memory segments, Private Peripheral Bus (PPB), System Control Space (SCS), System Control Block (SCB), memory types and properties, instruction and data alignment, endianness, memory barrier instructions (DMB, DSB, ISB), system caches and caching behavior, normal memory vs device memory, memory access ordering\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>ARMv6-M Memory Model\r\n\u003Cul>\r\n\u003Cli>System address map, memory segments, Private Peripheral Bus (PPB), System Control Space (SCS), System Control Block (SCB)\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>ARMv7-M Exception Handling\r\n\u003Cul>\r\n\u003Cli>Exception overhead, exception types, external interrupts, exception model, vector table, exception priorities, interrupt entry and exit timing, NMI, nesting, tail chaining\u003C/li>\r\n\u003Cli>Priority boosting, disabling interrupts, priority groups, interrupt control and status fields, pulse vs level-sensitive interrupts, writing interrupt handlers, System Service Call (SVC), fault exceptions, lockup state, precise vs imprecise exceptions\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>ARMv6-M Exception Handling\r\n\u003Cul>\r\n\u003Cli>Vector table, exception priorities, returning from interrupt, NMI, supported priority groups, disabling interrupts, interrupt control and status bits, fault exceptions, lockup state\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>C / C++ Compiler Hints and Tips\r\n\u003Cul>\r\n\u003Cli>Variable types supported, optimization levels, automatic optimizations, use of \"volatile\", instruction scheduling, inlining of functions, loop unrolling, branch target optimizations, multi-file compilation\u003C/li>\r\n\u003Cli>Register usage, parameter passing, loop termination, division operations, floating point, Cortex-M3 / M4 bit-banding, C++ support, mixing C and Assembly, CMSIS, intrinsics, named register variables, embedded assembler, inline assembler, variable types, global data, packing of structures, alignment of pointers, optimization of \u003Cem>memcpy()\u003C/em>, base pointer optimization\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>Linker and Library Hints and Tips\r\n\u003Cul>\r\n\u003Cli>Purpose of linker, object files, libraries, creating and maintaining libraries, scatter-loading, veneers, stack issues, unused section elimination, raw data compression, small function inlining, linking for specific target, debug issues, useful linker diagnostics\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>ARMv7-M Synchronization\r\n\u003Cul>\r\n\u003Cli>Need for atomicity, critical sections, LDREX and STREX instructions, \u003Cem>lock()\u003C/em> and \u003Cem>unlock()\u003C/em> examples, context switching, memory attributes, multiprocessor mutex, synchronization primitives, legacy SWP instruction\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>Embedded Software Development for Cortex-M Processors\r\n\u003Cul>\r\n\u003Cli>Embedded development process, default memory map, default C library, reset and initialization, CMSIS startup and initialization, scatter-loading, linker placement rules, root regions\u003C/li>\r\n\u003Cli>Run-time memory management, stack and heap, MPU initialization, extending functions, Thumb C libraries, retargeting the C library, debugging ROM images\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>Cortex-M3 / M4 Debug and Trace\r\n\u003Cul>\r\n\u003Cli>Debug features, CoreSight overview, debug access paths, halted debug mode, vector catch, semihosting, Flash Patch and Breakpoint unit (FPB), Data Watchpoint and Trace (DWT), Instrumentation Trace Macrocell (ITM), Embedded Trace Macrocell (ETM), TPIU interface, physical interfaces\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>Cortex-M0 Debug\r\n\u003Cul>\r\n\u003Cli>CoreSight, non-invasive debug, debug state, debug events, Debug Access Port (DAP), ROM Tables, breakpoints and watchpoints, Breakpoint Unit (BPU), Data Watchpoint and Trace (DWT), vector catch, debug vs non-debug version, registers and fields related to debug\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>Cortex-M0+ CoreSight Micro Trace Buffer\r\n\u003Cul>\r\n\u003Cli>CoreSight MTB-M0+, MTB interfaces, MTB operation, MTB packet format, memory model, POSITION register, MASTER register, FLOW register, BASE register, using TSTART and TSTOP signals, AHB-Lite interface, SRAM memory interface, trace enable and disable sequence \u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>ARMv7-M Memory Protection\r\n\u003Cul>\r\n\u003Cli>Memory map and protection overview, MPU and bus faults, regions, sub-regions, memory types, access permissions, region overlapping (overlaying), MPU-related registers\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cul>\r\n\u003Cli>Cortex-M4 Additions\r\n\u003Cul>\r\n\u003Cli>Cortex-M4 features, PPA, gate count summary, DSP capability and instruction set, SIMD instructions, single precision floating point\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>","2019-04-09T10:24:35.000000Z","2025-06-03T16:43:23.000000Z","public/live_training_courses/thumbnails/live_training_course_715_thumbnail_1748360486.png","arm-mcu-architecture",82,{"id":86,"title":851,"created_at":852,"updated_at":853,"order":89},[1007,1021,1034],{"id":1008,"name":1009,"about":1010,"instructor_fullname":139,"instructor_email":140,"price":692,"price_arbor":692,"created_at":39,"updated_at":1011,"you_will_learn":998,"equivelent_of":86,"subscription_length":43,"video_id":1012,"is_active":12,"prerequisites":704,"modified_at":13,"order":1013,"presentation_id":1014,"slug":1015,"course_category_id":47,"release_date":129,"old_product_id":225,"meta_description":1016,"meta_keywords":1017,"author_signature":152,"description":1018,"meta_title":1009,"whats_included":1019,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":1020},1715,"ARM MCU Architecture eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"ARM MCU\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","2025-10-31T13:10:04.000000Z",37721,60,382,"arm-mcu-architecture-elearning-course","ARM Accredited MCU Engineer eLearning Course","arm, accredited, microcontroller, elearning, certification","\u003Cp>\u003Cspan class=\"sectionsubhead\">ARM Endorsement:\u003C/span>\u003C/p>\r\n\u003Cp style=\"padding-left: 40px;\">\u003Cem>“On the strength of MindShare’s position as an industry leader in technology training, particularly in the area of microprocessor architecture, we were happy to welcome them to the AAE program as an ARM Accreditation Training Partner (AATP). Their expertise in delivering engaging self-paced eLearning courses should make MindShare's ARM Accredited Engineer Certification eLearning course a very good way to efficiently and cost-effectively prepare for the ARM Accredited Engineer (AAE) exam”.\u003C/em>\u003Cbr>\u003Cstrong>- Daniel Dearing, AAE Program Manager\u003C/strong>\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>This was the only eLearning course endorsed by ARM for anyone wanting to take the ARM MCU Certification exam when ARM was still offering their AAME certification program (AAME - ARM Approved MCU Engineer). That program has been discontinued by ARM, but the information in this course is still very relevant and extremely valuable for anyone working with ARM microcontrollers.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/armmcu_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/armmcu_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>ARM MCU eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":994,"elearning_course_id":1008},{"id":1022,"name":1023,"about":1024,"instructor_fullname":139,"instructor_email":140,"price":122,"price_arbor":122,"created_at":39,"updated_at":1025,"you_will_learn":1026,"equivelent_of":86,"subscription_length":43,"video_id":1027,"is_active":12,"prerequisites":164,"modified_at":13,"order":19,"presentation_id":1028,"slug":1029,"course_category_id":47,"release_date":129,"old_product_id":870,"meta_description":1030,"meta_keywords":1030,"author_signature":152,"description":1031,"meta_title":1023,"whats_included":1032,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":1033},1743,"ARMv8-M and v8.1-M eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"ARMv8-M\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","2025-10-31T13:13:15.000000Z","\u003Cul>\r\n\u003Cli>ARM’s v8-M architecture.\u003C/li>\r\n\u003Cli>The relationship to other ARM architectures.\u003C/li>\r\n\u003Cli>The changes from the earlier v6-M and v7-M architectures.\u003C/li>\r\n\u003Cli>The optional FPU and DSP extensions.\u003C/li>\r\n\u003Cli>Platform and tools overview.\u003C/li>\r\n\u003C/ul>",37749,482,"armv8-m-and-v81-m-elearning-course","ARMv8-M and v8.1-M Architecture","\u003Cp>This course is aimed at software developers and system architects developing for systems powered by ARMv8-M processors, such as the Cortex-M23 and the Cortex-M33 processors. It is relevant for operating system development, device driver development, low-level coding and security firmware, and for validation and debug.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/armv8m_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/armv8m_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>ARMv8-M and v8.1-M eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":994,"elearning_course_id":1022},{"id":1035,"name":1036,"about":1037,"instructor_fullname":139,"instructor_email":140,"price":823,"price_arbor":823,"created_at":39,"updated_at":1038,"you_will_learn":1039,"equivelent_of":146,"subscription_length":43,"video_id":1040,"is_active":12,"prerequisites":704,"modified_at":13,"order":1041,"presentation_id":1042,"slug":1043,"course_category_id":47,"release_date":129,"old_product_id":1044,"meta_description":1036,"meta_keywords":1045,"author_signature":152,"description":1046,"meta_title":1036,"whats_included":1047,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":1048},1731,"ARM Cortex-M7 Processor eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"ARM Cortex-M7\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","2025-10-31T13:11:19.000000Z","\u003Cul>\r\n\u003Cli>Architectural Features of the M7 Processor\u003C/li>\r\n\u003Cli>Powerful & Scalable Instruction Set\u003C/li>\r\n\u003Cli>Interrupts and Exceptions\u003C/li>\r\n\u003Cli>System Interface Architecture\u003C/li>\r\n\u003Cli>Caches\u003C/li>\r\n\u003Cli>Memory Model\u003C/li>\r\n\u003Cli>Assembler Programming intro\u003C/li>\r\n\u003Cli>Debug Features / Techniques\u003C/li>\r\n\u003C/ul>",37737,66,442,"arm-cortex-m7-processor-elearning-course",623,"arm cortex-m7, microcontroller, elearning, training, tutorial","\u003Cp>The ARM Cortex-M7 Architecture eLearning course focuses on software aspects of the ARMv7-M Architecture profiles (Cortex-M7). This course is aimed at embedded software and systems developers who wish to acquire a broad knowledge of ARM technology with a bias toward the microcontroller market.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/armm7_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/armm7_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>Cortex-M7 eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":994,"elearning_course_id":1035},[1050,1101,1131,1148],{"id":1051,"name":1052,"description":1053,"about":1054,"you_will_learn":1055,"prerequisites":1056,"is_active":12,"modified_at":13,"course_outline":1057,"created_at":1058,"updated_at":1059,"duration":395,"category_id":396,"order":19,"thumbnail":1060,"slug":1061,"old_live_courses_id":1062,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":1063,"category":1064,"elearning_courses":1068},698,"x86 64-bit Architecture","\u003Cp>This course teaches the x86 architecture (both 32-bit and 64-bit) through a mix of lectures and hands-on programming labs. All topics are explained in lecture format first and then the students are given programming labs in Assembly Language to reinforce the concepts and to get hands-on experience working with x86 processors at a very low level.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"x86 64-bit Architecture\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>x86 architecture basics like an overview of the instruction set, register set and operating modes\u003C/li>\r\n\u003Cli>The behavior of segmentation, how it was originally intended to be used and how it is actually used by operating systems today (both 32-bit and 64-bit OSs)\u003C/li>\r\n\u003Cli>How to setup system calls using multiple methods (and what are benefits / side-effects of each)\u003C/li>\r\n\u003Cli>How to setup interrupt service routines for both software and hardware interrupts as well as exceptions\u003C/li>\r\n\u003Cli>How to implement paging in both the 32-bit environments as well as the 64-bit environments including using various page sizes\u003C/li>\r\n\u003Cli>What the concepts of virtualization are and the behavior of the x86 hardware extensions for virtualization (including benefits and side-effects)\u003C/li>\r\n\u003C/ul>","\u003Cp>General familiarity with computer architecture is recommended.\u003C/p>","\u003Cul>\r\n                \u003Cli>x86 Instruction Set Background\u003C/li>\r\n                \u003Cli>Intro to the Instruction Set\r\n                \u003Cul>\r\n                    \u003Cli>General Purpose Instructions\u003C/li>\r\n                    \u003Cli>Floating Point and SIMD Instructions\r\n                    \u003Cul>\r\n                        \u003Cli>x87, MMX, SSE, AVX, AVX-2, AVX-512\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Program Flow-related Instructions\u003C/li>\r\n                    \u003Cli>Hardware-Related Instructions\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Intro to the Register Set and Address Spaces\r\n                \u003Cul>\r\n                    \u003Cli>General Purpose registers (GPRs)\u003C/li>\r\n                    \u003Cli>x87 / MMX registers\u003C/li>\r\n                    \u003Cli>XMM / YMM /ZMM registers\u003C/li>\r\n                    \u003Cli>Segmentation registers\u003C/li>\r\n                    \u003Cli>Control registers\u003C/li>\r\n                    \u003Cli>Debug registers\u003C/li>\r\n                    \u003Cli>Model-Specific registers (MSRs)\u003C/li>\r\n                    \u003Cli>Memory, IO, and Configuration Spaces\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Operating Modes\r\n                \u003Cul>\r\n                    \u003Cli>Real Mode\u003C/li>\r\n                    \u003Cli>Protected Mode\u003C/li>\r\n                    \u003Cli>Virtual-8086 Mode\u003C/li>\r\n                    \u003Cli>System Management Mode\u003C/li>\r\n                    \u003Cli>Long (IA32e) Mode\r\n                    \u003Cul>\r\n                        \u003Cli>64-bit Mode\r\n                        \u003Cul>\r\n                            \u003Cli>REX prefixes\u003C/li>\r\n                        \u003C/ul>\r\n                        \u003C/li>\r\n                        \u003Cli>Compatibility Mode\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Real Mode Operation\u003C/li>\r\n                \u003Cli>Introduction to Multitasking\u003C/li>\r\n                \u003Cli>Segmentation (Protected Mode)\r\n                \u003Cul>\r\n                    \u003Cli>Privilege Levels (Rings)\u003C/li>\r\n                    \u003Cli>Code and Data Segment Descriptors\u003C/li>\r\n                    \u003Cli>Segment Registers (CS, SS, DS, ES, FS, GS)\u003C/li>\r\n                    \u003Cli>Global Descriptor Table (GDT)\u003C/li>\r\n                    \u003Cli>Local Descriptor Table (LDT)\u003C/li>\r\n                    \u003Cli>Flat memory model vs protected memory model\u003C/li>\r\n                    \u003Cli>\u003Cspan style=\"color: rgb(153, 51, 0);\">HANDS-ON LAB:\u003C/span> covering Protected Mode Segmentation\u003C/li>\r\n                    \u003Cli>Segmentation in Long Mode\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Control Transfers\r\n                \u003Cul>\r\n                    \u003Cli>Far Jumps and Calls\u003C/li>\r\n                    \u003Cli>Call Gates\u003C/li>\r\n                    \u003Cli>Optimized System Calls\r\n                    \u003Cul>\r\n                        \u003Cli>SYSCALL / SYSRET\u003C/li>\r\n                        \u003Cli>SYSENTER / SYSEXIT\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Automatic Stack Switching\u003C/li>\r\n                    \u003Cli>\u003Cspan style=\"color: rgb(153, 51, 0);\">HANDS-ON LAB:\u003C/span> covering system calls\u003C/li>\r\n                    \u003Cli>Control Transfers in Long Mode\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Task Management\r\n                \u003Cul>\r\n                    \u003Cli>Software vs. Hardware task switching\u003C/li>\r\n                    \u003Cli>Task State Segments (TSS)\u003C/li>\r\n                    \u003Cli>Task Gates\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Interrupts and Exceptions\r\n                \u003Cul>\r\n                    \u003Cli>Hardware vs. Software interrupts\u003C/li>\r\n                    \u003Cli>Vectors\u003C/li>\r\n                    \u003Cli>Interrupt priorities\u003C/li>\r\n                    \u003Cli>Exceptions and their classifications (faults, traps and aborts)\u003C/li>\r\n                    \u003Cli>Interrupt Descriptor Table (IDT)\u003C/li>\r\n                    \u003Cli>Interrupt Gates vs Trap Gates\u003C/li>\r\n                    \u003Cli>Stack behavior on an interrupt / exception\r\n                    \u003Cul>\r\n                        \u003Cli>Error codes\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>\u003Cspan style=\"color: rgb(153, 51, 0);\">HANDS-ON LAB:\u003C/span> covering interrupt handling\u003C/li>\r\n                    \u003Cli>Interrupt handling in Long Mode\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Paging\r\n                \u003Cul>\r\n                    \u003Cli>Purpose of Paging\u003C/li>\r\n                    \u003Cli>Paging Basics\r\n                    \u003Cul>\r\n                        \u003Cli>Physical vs. Virtual (Linear) Address Space\u003C/li>\r\n                        \u003Cli>Swap space (secondary storage)\u003C/li>\r\n                        \u003Cli>x86 paging structures\r\n                        \u003Cul>\r\n                            \u003Cli>Page Directory Entries (PDEs)\u003C/li>\r\n                            \u003Cli>Page Table Entries (PTEs)\u003C/li>\r\n                        \u003C/ul>\r\n                        \u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>TLBs (Translation Lookaside Buffers)\r\n                    \u003Cul>\r\n                        \u003Cli>Managing TLBs (INVLPG, PCID, VPID topics etc.)\u003C/li>\r\n                        \u003Cli>Global pages\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>x86 Paging Modes (features)\r\n                    \u003Cul>\r\n                        \u003Cli>Page Size Extensions (PSE)\u003C/li>\r\n                        \u003Cli>Physical Address Extensions (PAE)\r\n                        \u003Cul>\r\n                            \u003Cli>3-level lookup: Page Directory Pointer Entries (PDPE)\u003C/li>\r\n                        \u003C/ul>\r\n                        \u003C/li>\r\n                        \u003Cli>IA32e (Long) Mode Paging\r\n                        \u003Cul>\r\n                            \u003Cli>4-level lookup: Page Map Level 4 Entries (PML4E)\u003C/li>\r\n                        \u003C/ul>\r\n                        \u003C/li>\r\n                        \u003Cli>Execute Disable functionality\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>\u003Cspan style=\"color: rgb(153, 51, 0);\">HANDS-ON LAB:\u003C/span> covering paging\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Memory Types\r\n                \u003Cul>\r\n                    \u003Cli>Intro to Caches\u003C/li>\r\n                    \u003Cli>Memory Types\r\n                    \u003Cul>\r\n                        \u003Cli>UC – Uncacheable (and UC-)\u003C/li>\r\n                        \u003Cli>WC – Write Combining\u003C/li>\r\n                        \u003Cli>WP – Write Protect\u003C/li>\r\n                        \u003Cli>WT – Write Through\u003C/li>\r\n                        \u003Cli>WB – Write Back\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Assignment Mechanisms\r\n                    \u003Cul>\r\n                        \u003Cli>Memory Type and Range Registers (MTRRs)\u003C/li>\r\n                        \u003Cli>Page Attribute Table Register (PAT)\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Intro to Virtualization Technology (Intel-VT)\r\n                \u003Cul>\r\n                    \u003Cli>What is virtualization\u003C/li>\r\n                    \u003Cli>Hardware extensions: Intel-VTx\r\n                    \u003Cul>\r\n                        \u003Cli>VMX Root Mode (Host Mode) vs VMX non-Root Mode (Guest Mode)\u003C/li>\r\n                        \u003Cli>Virtual Machine Control Structure (VMCS)\u003C/li>\r\n                        \u003Cli>Intel-VT instructions (VMLAUNCH, VMRESUME, etc.) and #VMEXIT\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Memory Management with Virtualization\r\n                    \u003Cul>\r\n                        \u003Cli>Shadow Page Tables\u003C/li>\r\n                        \u003Cli>Extended (Nested) Page Tables\u003C/li>\r\n                        \u003Cli>TLB Management with Virtualization\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Data Protection Extensions\u003Cbr>\r\n                \u003Cul>\r\n                    \u003Cli>Intel SGX (Software Guard eXtensions)\u003C/li>\r\n                    \u003Cli>Intel MPX (Memory Protection eXtensions)\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Performance Monitoring\r\n                \u003Cul>\r\n                    \u003Cli>Precision Event Based Sampling (PEBS)\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>System Management Mode\u003C/li>\r\n            \u003C/ul>","2022-07-28T11:38:29.000000Z","2025-06-03T17:07:28.000000Z","public/live_training_courses/thumbnails/live_training_course_698_thumbnail_1748360589.png","x86-64bit-architecture",33,"\u003Cul>\r\n\u003Cli>PDF of course slides\u003C/li>\r\n\u003Cli>\"\u003Ca href=\"../../ebook/x86-instruction-set-architecture\">x86 Instruction Set Architecture\u003C/a>\" eBook\u003C/li>\r\n\u003C/ul>",{"id":396,"title":1065,"created_at":1066,"updated_at":1067,"order":47},"x86 Architecture","2024-01-15T11:40:57.000000Z","2025-02-04T21:38:33.000000Z",[1069,1086],{"id":1070,"name":1071,"about":1072,"instructor_fullname":374,"instructor_email":409,"price":83,"price_arbor":83,"created_at":39,"updated_at":1073,"you_will_learn":1074,"equivelent_of":47,"subscription_length":43,"video_id":1075,"is_active":12,"prerequisites":45,"modified_at":1076,"order":42,"presentation_id":1077,"slug":1078,"course_category_id":1079,"release_date":51,"old_product_id":1080,"meta_description":1081,"meta_keywords":1082,"author_signature":383,"description":1083,"meta_title":1071,"whats_included":1084,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":1085},1735,"Intel x86 Processor and Platform Architecture eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"Intel Processors and Platforms\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","2025-10-31T13:11:38.000000Z","\u003Cul>\r\n\u003Cli>Intel x86 CPU and Chipset Evolution\u003C/li>\r\n\u003Cli>Current Core and Xeon CPUs: Ice Lake, Cascade Lake, plus “Refresh” Variants\u003C/li>\r\n\u003Cli>x86 Instruction Set Architecture (ISA) and CPU Operating Modes\u003C/li>\r\n\u003Cli>Core and Xeon CPU Microarchitecture Differences\u003C/li>\r\n\u003Cli>Caches\u003C/li>\r\n\u003Cli>Platform Addressing\u003C/li>\r\n\u003Cli>Main Memory DRAM\u003C/li>\r\n\u003Cli>Ultra Path Interconnect (UPI)\u003C/li>\r\n\u003Cli>CPU Integrated Graphics\u003C/li>\r\n\u003Cli>CPU Integrated IO (IIO)\u003C/li>\r\n\u003Cli>Interrupt Handling\u003C/li>\r\n\u003Cli>Hardware Virtualization Support\u003C/li>\r\n\u003Cli>Platform Controller Hub (PCH) Features\u003C/li>\r\n\u003Cli>Power and Thermal Management\u003C/li>\r\n\u003Cli>CPU Performance Monitoring\u003C/li>\r\n\u003C/ul>",37741,"2025-08-05 14:37:08",458,"intel-x86-processor-and-platform-architecture-elearning-course",148,651,"Intel x86 processor and platform architecture eLearning course","intel, x86, processor, platform, architecture, elearning, online training","\u003Cp>Each CPU and chipset generation brings new capabilities while maintaining backward compatibility with earlier platforms. New 9th and 10th generation CPU architectures offer significant improvements in instruction throughput, power conservation, integrated graphics, security, system-on-a-chip (SOC) packaging options, etc. This 5-day course introduces the x86 Instruction Set Architecture (ISA) and describes the hardware features of the latest Intel Core and Xeon CPUs supporting it. In addition, the course presents an overview of memory, platform controller hub (PCH) logic, and IO interfaces that may be employed when implementing common system types.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>A full understanding of an Intel x86 hardware platform includes knowledge of CPU/PCH capabilities, BIOS/OS setup of programmable platform features, as well as the dynamic status of the system with regards to thermal and error events, etc. MindShare Arbor demonstrations integrated into this course present a decoded view of register setup, system and device status, as well as a coherent summary of platform information reported when the CPUID instruction is executed. Students may use Arbor software for real-time scans of local systems, read/modify specific registers, and even save Arbor scan results for later sharing and off-line review.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>This course is updated as frequently as possible in an attempt to provide a “snapshot” of Intel Core and Xeon x86 platform components and system implementations. Content is based on publicly available documents.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/x86proc_modules.png\" alt=\"PCIe Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/x86proc_slides.png\" alt=\"PDF Slides Thumbnail\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg style=\"max-height: 150px;\" src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/x86_cover_ds.png\" alt=\"PCIe eBook\" width=\"125\" height=\"155\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>Course eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>USB 3.0 eBook\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume / CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":1051,"elearning_course_id":1070},{"id":1087,"name":1088,"about":1089,"instructor_fullname":102,"instructor_email":103,"price":220,"price_arbor":13,"created_at":39,"updated_at":1090,"you_will_learn":1055,"equivelent_of":146,"subscription_length":43,"video_id":1091,"is_active":12,"prerequisites":164,"modified_at":1092,"order":19,"presentation_id":1093,"slug":1094,"course_category_id":1079,"release_date":51,"old_product_id":1095,"meta_description":1096,"meta_keywords":1097,"author_signature":115,"description":1098,"meta_title":1096,"whats_included":1099,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":1100},1752,"x86 Architecture eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"x86\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","2025-10-31T13:15:05.000000Z",37758,"2025-08-05 14:42:57",496,"x86-architecture-elearning-course",797,"x86 Architecture eLearning","x86, training, online, learning, tutorial, intel, amd","\u003Cp>\u003Cspan style=\"color: rgb(224, 62, 45);\">\u003Cstrong>Note: this course is a subset of our Intel Processor and Platform eLearning Course.\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>This course will be useful for anyone dealing with designing, verifying, validating, debugging, or developing for x86-based platforms. The x86 instruction set architecture has evolved over a period of almost 40 years. This course describes numerous aspects of the current architecture but also explains how we got to the current architecture based on the history and decisions made. It doesn't matter whether you're a hardware engineer or a software developer, this course has an enormous amount of relevant info for you.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/x86_modules.png\" alt=\"PCIe Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/x86_slides.png\" alt=\"PDF Slides Thumbnail\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg style=\"max-height: 150px;\" src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/x86_cover_ds.png\" alt=\"PCIe eBook\" width=\"125\" height=\"155\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>Course eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>x86 Architecture eBook\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume / CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":1051,"elearning_course_id":1087},{"id":1102,"name":1103,"description":1104,"about":1105,"you_will_learn":1106,"prerequisites":1107,"is_active":12,"modified_at":13,"course_outline":1108,"created_at":1109,"updated_at":1110,"duration":326,"category_id":396,"order":42,"thumbnail":1111,"slug":1112,"old_live_courses_id":1113,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":280,"category":1114,"elearning_courses":1115},697,"UEFI Architecture","\u003Cp>This course will give you a thorough understanding of how x86 UEFI firmware takes control of the system and prepares to hand control to an OS boot loader, starting from the reset vector. On the first day of training, we will give you a quick overview of legacy BIOS (and its inherent limitations) and review how UEFI and its architecture addresses legacy BIOS shortcomings.\u003Cbr>The other two days are dedicated to walking and working through the UEFI Forum's PI (Platform Initialization) spec's seven phases and explain how modules are discovered and dependencies are resolved as system hardware is initialized. We will wrap up with Secure Boot to get a better idea about Microsoft's boot requirements.\u003C/p>\r\n\u003Cp>This course is designed to be hands-on, allowing you to experiment with code that you will write to get a better handle on the various PI phases. At the end of the course, you will be able to write a DXE driver for a simple hardware device. You will also be able to write UEFI applications that run at the UEFI shell.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"x86 UEFI Architecture\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>The order and relevance of UEFI PI/Tiano's phases.\u003C/li>\r\n\u003Cli>When and *how* key subsystems and devices are detected, initialized, and configured.\u003C/li>\r\n\u003Cli>How to leverage Platform Configuration Database to simplify the coding process.\u003C/li>\r\n\u003Cli>How to write a PEI or DXE device driver.\u003C/li>\r\n\u003Cli>How to effectively debug PEI and DXE PI phases.\u003C/li>\r\n\u003Cli>Where device configuration and management information is collected, stored, and communicated between the phases and to an operating system, including ACPI info.\u003C/li>\r\n\u003Cli>Process of handing over system control from Firmware to OS.\u003C/li>\r\n\u003C/ul>","\u003Cp>Attendees are expected to have a technical background. Basic knowledge of assembly language programming, microprocessor technology, memory, and standard peripherals is expected.\u003C/p>","\u003Cp>\u003Cspan style=\"text-decoration: underline;\">\u003Cspan style=\"color: rgb(0, 0, 0); text-decoration: underline;\">\u003Cstrong>Firmware Fundamentals\u003C/strong>\u003C/span>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>What, why, and where is “firmware?”\u003C/li>\r\n\u003Cli>BIOS – The x86 legacy firmware architecture\u003C/li>\r\n\u003Cli>Limitations Legacy BIOS places on modern systems\u003C/li>\r\n\u003Cli>UEFI Forum’s Platform Initialization, Intel’s Framework, and UEFI (Unified Extensible Firmware\u003C/li>\r\n\u003Cli>Interface)\u003C/li>\r\n\u003Cli>x86 platform essentials\r\n\u003Cul>\r\n\u003Cli>CPU capabilities in real- and protected-mode.\u003C/li>\r\n\u003Cli>Real- and protected mode memory maps.\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"text-decoration: underline;\">\u003Cstrong>The UEFI PI and Tiano’s phases\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>SEC – Security phase\r\n\u003Cul>\r\n\u003Cli>Available system resources\u003C/li>\r\n\u003Cli>Authenticating firmware boot code\u003C/li>\r\n\u003Cli>Hand-off information.\u003C/li>\r\n\u003Cli>Lab - Inspect transfer from SEC to PEI\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>PEI – Pre-EFI Initialization phase\r\n\u003Cul>\r\n\u003Cli>Key PEI tasks\u003C/li>\r\n\u003Cli>PEI Foundation code\u003C/li>\r\n\u003Cli>PEIM – PEI Modules\r\n\u003Cul>\r\n\u003Cli>Detection\u003C/li>\r\n\u003Cli>Authentication\u003C/li>\r\n\u003Cli>Dependency resolution\u003C/li>\r\n\u003Cli>Execution\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>\u003Cstrong>Lab\u003C/strong>:\u003Cstrong> I\u003C/strong>nspect HOBs\u003C/li>\r\n\u003Cli>\u003Cstrong>Lab\u003C/strong>: Inspect Dispatcher Handoff.\u003C/li>\r\n\u003Cli>\u003Cstrong>Lab\u003C/strong>: Inspect DEPEX evaluation.\u003C/li>\r\n\u003Cli>\u003Cstrong>Lab\u003C/strong>: Detect and Trace DXE IPL handoff\u003C/li>\r\n\u003Cli>\u003Cstrong>Lab\u003C/strong>: Review Data Structures\r\n\u003Cul>\r\n\u003Cli>Flash File System\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>PPI – The PEIM-to-PEIM Interface.\u003C/li>\r\n\u003Cli>\u003Cstrong>Lab\u003C/strong> - Review PEIM-2-PEIM communication\u003C/li>\r\n\u003Cli>Creating HOBs – Hand-Off Blocks.\u003C/li>\r\n\u003Cli>DXE – Driver Execution Environment phase\r\n\u003Cul>\r\n\u003Cli>Key DXE tasks\u003C/li>\r\n\u003Cli>DXE Foundation code\u003C/li>\r\n\u003Cli>DXE Dispatcher\r\n\u003Cul>\r\n\u003Cli>The A Priori file\u003C/li>\r\n\u003Cli>Driver authentication\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>DXE and EFI drivers\r\n\u003Cul>\r\n\u003Cli>DXE driver model\u003C/li>\r\n\u003Cli>EFI driver model\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Creation of the EFI System Table and other descriptor tables.\u003C/li>\r\n\u003Cli>\u003Cstrong>Lab\u003C/strong>: Inspect DXE Core Entry\u003C/li>\r\n\u003Cli>\u003Cstrong>Lab\u003C/strong>: Inspect DXE driver load\u003C/li>\r\n\u003Cli>\u003Cstrong>Lab\u003C/strong>: Inspect PHIT\u003C/li>\r\n\u003Cli>\u003Cstrong>Lab\u003C/strong>: Review Events and Task Priority Levels\u003C/li>\r\n\u003Cli>\u003Cstrong>Lab\u003C/strong>: DXE driver implementation\u003C/li>\r\n\u003Cli>\u003Cstrong>Lab\u003C/strong>: Review Data Structures\r\n\u003Cul>\r\n\u003Cli>Handle Database\u003C/li>\r\n\u003Cli>EFI System Table\r\n\u003Cul>\r\n\u003Cli>Boot Services Table\u003C/li>\r\n\u003Cli>System Configuration Table\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>BDS – Boot Device Selection phase\r\n\u003Cul>\r\n\u003Cli>BDS and UEFI\u003C/li>\r\n\u003Cli>Console services\u003C/li>\r\n\u003Cli>Running EFI applications\u003C/li>\r\n\u003Cli>Boot paths\u003C/li>\r\n\u003Cli>Selecting a boot option\r\n\u003Cul>\r\n\u003Cli>Custom system configuration for selected operating system\u003C/li>\r\n\u003Cli>Operating system hand-off.\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>\u003Cstrong>Lab\u003C/strong>: UEFI memory application.\u003C/li>\r\n\u003Cli>Lab: Trace Shell Loading\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"text-decoration: underline;\">\u003Cstrong>ACPI Implementation in Tiano\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>ACPI Support driver\u003C/li>\r\n\u003Cli>ACPI Platform driver\u003C/li>\r\n\u003Cli>ACPI table storage\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"text-decoration: underline;\">\u003Cstrong>Firmware structure\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>Firmware devices\u003C/li>\r\n\u003Cli>Firmware volumes\u003C/li>\r\n\u003Cli>FFS – the Firmware File System\u003C/li>\r\n\u003Cli>Different firmware file types\u003C/li>\r\n\u003Cli>Firmware file components\r\n\u003Cul>\r\n\u003Cli>Header\u003C/li>\r\n\u003Cli>Different sections\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>\u003Cstrong>Lab\u003C/strong>: Inspect Firmware Volume Structure.\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"text-decoration: underline;\">\u003Cstrong>EFI disk organization\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>GUID partition advantages\u003C/li>\r\n\u003Cli>MBR preservation\u003C/li>\r\n\u003Cli>GPT (GUID Partition Table) disk architecture\u003C/li>\r\n\u003Cli>The System partition\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"text-decoration: underline;\">\u003Cstrong>Secure Boot\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>Exactly what is Secure Boot?\u003C/li>\r\n\u003Cli>How Secure Boot works\u003C/li>\r\n\u003Cli>OS vendors and Secure Boot\u003C/li>\r\n\u003Cli>Industry concerns\u003C/li>\r\n\u003C/ul>","2022-07-28T12:27:54.000000Z","2025-06-24T16:42:26.000000Z","public/live_training_courses/thumbnails/live_training_course_697_thumbnail_1748360667.png","uefi-architecture",29,{"id":396,"title":1065,"created_at":1066,"updated_at":1067,"order":47},[1116],{"id":1117,"name":1118,"about":1119,"instructor_fullname":139,"instructor_email":140,"price":83,"price_arbor":83,"created_at":39,"updated_at":1120,"you_will_learn":1106,"equivelent_of":89,"subscription_length":43,"video_id":1121,"is_active":12,"prerequisites":1107,"modified_at":13,"order":19,"presentation_id":1122,"slug":1123,"course_category_id":1124,"release_date":129,"old_product_id":1125,"meta_description":1126,"meta_keywords":1127,"author_signature":152,"description":1128,"meta_title":1126,"whats_included":1129,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":1130},1747,"UEFI x64 Architecture eLearning Course","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"UEFI\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","2025-10-31T13:14:09.000000Z",37753,489,"uefi-x64-architecture-elearning-course",149,755,"UEFI x64 Architecture eLearning","uefi, training, elearning","\u003Cp>This course will give you a thorough understanding of how x86 UEFI firmware takes control of the system and prepares to hand control to an OS boot loader, starting from the reset vector. On the first day of training, we will give you a quick overview of legacy BIOS (and its inherent limitations) and review how UEFI and its architecture addresses legacy BIOS shortcomings.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>The other two days are dedicated to walking and working through the UEFI Forum's PI (Platform Initialization) spec's seven phases and explain how modules are discovered and dependencies are resolved as system hardware is initialized. We will wrap up with Secure Boot to get a better idea about Microsoft's boot requirements.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>This course is designed to be hands-on, allowing you to experiment with code that you will write to get a better handle on the various PI phases. At the end of the course, you will be able to write a DXE driver for a simple hardware device. You will also be able to write UEFI applications that run at the UEFI shell.\u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/uefi_modules.png\" alt=\"Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"35%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/uefi_slides.png\" alt=\"img\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>UEFI eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume/CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>",{"live_training_course_id":1102,"elearning_course_id":1117},{"id":1132,"name":1133,"description":1134,"about":1135,"you_will_learn":1074,"prerequisites":1136,"is_active":12,"modified_at":13,"course_outline":1137,"created_at":1138,"updated_at":1139,"duration":395,"category_id":396,"order":146,"thumbnail":1140,"slug":1141,"old_live_courses_id":1142,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":1143,"category":1144,"elearning_courses":1145},699,"Intel Processor and Platform Architecture","\u003Cp class=\"MsoNormal\" style=\"margin-bottom: .0001pt; line-height: normal;\">Each CPU and chipset generation brings new capabilities while maintaining backward compatibility with earlier platforms. New 9th and 10th generation CPU architectures offer significant improvements in instruction throughput, power conservation, integrated graphics, security, system-on-a-chip (SOC) packaging options, etc. This 5-day course introduces the x86 Instruction Set Architecture (ISA) and describes the hardware features of the latest Intel Core and Xeon CPUs supporting it. In addition, the course presents an overview of memory, platform controller hub (PCH) logic, and IO interfaces that may be employed when implementing common system types.\u003C/p>\r\n\u003Cp class=\"MsoNormal\" style=\"margin-bottom: .0001pt; line-height: normal;\"> \u003C/p>\r\n\u003Cp class=\"MsoNormal\" style=\"margin-bottom: .0001pt; line-height: normal;\">\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"Intel Processor and Platform Architecture\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cp>A basic understanding of computer architecture is helpful.\u003C/p>","\u003Cul>\r\n                \u003Cli>Intel x86 Core and Xeon Platform Background\r\n                \u003Cul>\r\n                    \u003Cli>Intel 64 and IA-32 CPU lineage\r\n                    \u003Cul>\r\n                        \u003Cli>80386 to Ice Lake/Cascade Lake\u003C/li>\r\n                        \u003Cli>Core and Xeon CPUs Expected Next\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Ice Lake/Cascade Lake Platform Examples\r\n                    \u003Cul>\r\n                        \u003Cli>Gaming Desktop\u003C/li>\r\n                        \u003Cli> 2-in-1 Laptop\u003C/li>\r\n                        \u003Cli>Xeon Scalable CPU Server\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>x86 Instruction Set Architecture (ISA)\r\n                \u003Cul>\r\n                    \u003Cli>CPU Core Fetch/Decode/Execute Role\u003C/li>\r\n                    \u003Cli>x86 Instruction Basics\u003C/li>\r\n                    \u003Cli>Instruction Set Overview\r\n                    \u003Cul>\r\n                        \u003Cli>General Purpose Instructions\u003C/li>\r\n                        \u003Cli>Floating Point and SIMD Instructions\u003C/li>\r\n                        \u003Cli>Program Flow Instructions\u003C/li>\r\n                        \u003Cli>Hardware-Related Instructions\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>x86 Register Set Overview\r\n                    \u003Cul>\r\n                        \u003Cli>General Purpose Registers (GPRs)\u003C/li>\r\n                        \u003Cli>X87/MMX Registers\u003C/li>\r\n                        \u003Cli>XMM/YMM/ZMM Registers\u003C/li>\r\n                        \u003Cli>Segmentation Registers\u003C/li>\r\n                        \u003Cli>Control Registers\u003C/li>\r\n                        \u003Cli>Debug Registers\u003C/li>\r\n                        \u003Cli>Model-Specific Registers (MSRs)\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>x86 CPU Operating Modes\r\n                    \u003Cul>\r\n                        \u003Cli>Real Mode\u003C/li>\r\n                        \u003Cli>Protected Mode\u003C/li>\r\n                        \u003Cli>Virtual-8086 Mode\u003C/li>\r\n                        \u003Cli>System-Management Mode (SMM)\u003C/li>\r\n                        \u003Cli>IA32e (Long) Mode\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Platform Addressing\r\n                \u003Cul>\r\n                    \u003Cli>Introduction to x86 Address Spaces\r\n                    \u003Cul>\r\n                        \u003Cli>Memory (DRAM and MMIO Space)\u003C/li>\r\n                        \u003Cli>IO (Fixed and Relocatable Legacy Registers)\u003C/li>\r\n                        \u003Cli>PCI (Peripheral Component Interconnect) Space\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Platform Traffic Types\r\n                    \u003Cul>\r\n                        \u003Cli>Programmed IO (PIO)\u003C/li>\r\n                        \u003Cli>DMA (Direct Memory Access)\u003C/li>\r\n                        \u003Cli>Peer-to-Peer\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Memory Segmentation\u003C/li>\r\n                    \u003Cli>Real Mode\r\n                    \u003Cul>\r\n                        \u003Cli>Protected Mode\u003C/li>\r\n                        \u003Cli>Memory Paging\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Paging\r\n                    \u003Cul>\r\n                        \u003Cli>Translation Lookaside Buffer (TLB) Role\u003C/li>\r\n                        \u003Cli>x86 Paging Modes: Basic 4K Paging, PSE, PAE, IA32e Mode Paging\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Core CPU Microarchitecture (10th Generation Ice Lake)\r\n                \u003Cul>\r\n                    \u003Cli>CPU Internal Architecture Overview\u003C/li>\r\n                    \u003Cli>Processor Instruction Pipeline & Execution Units\u003C/li>\r\n                    \u003Cli>Implications of HyperThreading\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Architectural Differences: Cascade Lake Xeon Scalable CPU vs. Ice Lake Core CPU\r\n                \u003Cul>\r\n                    \u003Cli>Maximum Core/Thread Count = 28/56\u003C/li>\r\n                    \u003Cli>Enhanced AVX Execution Unit Resources\u003C/li>\r\n                    \u003Cli>32KB L1 Code/Data Caches, 1MB L2 Unified Cache\u003C/li>\r\n                    \u003Cli>Non-inclusive L3 Cache with 2D Mesh Interconnect\u003C/li>\r\n                    \u003Cli>L3 Cache Slice Distributed Caching/Home Agent (CHA)\u003C/li>\r\n                    \u003Cli>ECC DRAM and Support for Persistent Memory (Optane) PMDIMMs\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Cache Topics\r\n                \u003Cul>\r\n                    \u003Cli>Cache Basics\r\n                    \u003Cul>\r\n                        \u003Cli>Five Memory Map Region Types: UC, WC, WB, WT, WP\u003C/li>\r\n                        \u003Cli>Cache Policy Management: MTRRs and Paging Structures\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>CPU Conduct in the Five Memory Regions\u003C/li>\r\n                    \u003Cli>Cache Hardware Architecture\u003C/li>\r\n                    \u003Cli>Cache/Memory QoS and Intel Resource Director Technology (RDT)\r\n                    \u003Cul>\r\n                        \u003Cli>Cache Monitoring Technology (CMT)\u003C/li>\r\n                        \u003Cli>Cache Allocation Technology (CAT)\u003C/li>\r\n                        \u003Cli>Code and Data Priority (CDP)\u003C/li>\r\n                        \u003Cli>Memory Bandwidth Monitoring (MBM)\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                    \u003Cli>Other Cache Topics\r\n                    \u003Cul>\r\n                        \u003Cli>PAT Feature\u003C/li>\r\n                        \u003Cli>Software Prefetch Instruction\u003C/li>\r\n                        \u003Cli>Non-Temporal Data\u003C/li>\r\n                        \u003Cli>Data Direct IO (DDIO)\u003C/li>\r\n                    \u003C/ul>\r\n                    \u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Key Platform Interfaces\r\n                \u003Cul>\r\n                    \u003Cli>CPU and PCH Interface Overview\u003C/li>\r\n                    \u003Cli>Main Memory DRAM\u003C/li>\r\n                    \u003Cli>Intel Ultra Path Interconnect (UPI)\u003C/li>\r\n                    \u003Cli>PCI Express (PCIe)\u003C/li>\r\n                    \u003Cli>Universal Serial Bus (USB)\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>PCI Configuration Space\r\n                \u003Cul>\r\n                    \u003Cli>Basics of Discovery and Enumeration\u003C/li>\r\n                    \u003Cli>Client and Server Machine PCI Topology Examples\u003C/li>\r\n                    \u003Cli>PCI Headers, Compatible Configuration Space, Extended Configuration Space\u003C/li>\r\n                    \u003Cli>Accessing PCI Configuration Space\u003C/li>\r\n                    \u003Cli>Arbor Software View of PCI Configuration Space\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Platform Interrupt Handling\r\n                \u003Cul>\r\n                    \u003Cli>IOAPIC\u003C/li>\r\n                    \u003Cli>Local APICs\u003C/li>\r\n                    \u003Cli>Message Signaled Interrupt (MSI/MSI-X) Basics\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Platform Power Management\r\n                \u003Cul>\r\n                    \u003Cli>ACPI Overview\u003C/li>\r\n                    \u003Cli>CPU Power Management Features\u003C/li>\r\n                    \u003Cli>PCH Power Management\u003C/li>\r\n                    \u003Cli>IMC and DRAM Power Management\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>Platform Thermal Management\r\n                \u003Cul>\r\n                    \u003Cli>CPU Thermal Management Overview\u003C/li>\r\n                    \u003Cli>PCH Thermal Management\u003C/li>\r\n                    \u003Cli>DRAM Thermal Management\u003C/li>\r\n                \u003C/ul>\r\n                \u003C/li>\r\n                \u003Cli>System Management Mode (SMM)\u003C/li>\r\n                \u003Cli>Machine Check Architecture (MCA)\u003C/li>\r\n                \u003Cli>Other Topics (Coverage Depends on Interest Level and Time Available)\u003C/li>\r\n                \u003Cli>Virtualization Overview\u003C/li>\r\n            \u003C/ul>","2022-07-28T11:36:39.000000Z","2025-06-03T17:28:24.000000Z","public/live_training_courses/thumbnails/live_training_course_699_thumbnail_1748361048.png","intel-processor-and-platform-architecture",36,"\u003Cul>\r\n\u003Cli>PDF of course slides\u003C/li>\r\n\u003Cli>\"\u003Ca href=\"../../ebook/x86-instruction-set-architecture\">x86 Instruction Set Architecture\u003C/a>\" eBook\u003C/li>\r\n\u003Cli>Optional Add-On: \u003Ca href=\"../../elearning-course/intel-x86-processor-and-platform-architecture-elearning-course\">Intel Processor and Platform eLearning\u003C/a> course\u003C/li>\r\n\u003C/ul>",{"id":396,"title":1065,"created_at":1066,"updated_at":1067,"order":47},[1146],{"id":1070,"name":1071,"about":1072,"instructor_fullname":374,"instructor_email":409,"price":83,"price_arbor":83,"created_at":39,"updated_at":1073,"you_will_learn":1074,"equivelent_of":47,"subscription_length":43,"video_id":1075,"is_active":12,"prerequisites":45,"modified_at":1076,"order":42,"presentation_id":1077,"slug":1078,"course_category_id":1079,"release_date":51,"old_product_id":1080,"meta_description":1081,"meta_keywords":1082,"author_signature":383,"description":1083,"meta_title":1071,"whats_included":1084,"evaluation_id":58,"vector_store_id":13,"ai_assistant_id":13,"pivot":1147},{"live_training_course_id":1132,"elearning_course_id":1070},{"id":623,"name":1149,"description":1150,"about":1151,"you_will_learn":1152,"prerequisites":1153,"is_active":12,"modified_at":13,"course_outline":1154,"created_at":1155,"updated_at":1156,"duration":183,"category_id":396,"order":86,"thumbnail":1157,"slug":1158,"old_live_courses_id":1159,"publisher":13,"author":13,"max_seats":13,"price":13,"location":13,"instructors":13,"meta_title":13,"meta_keywords":13,"meta_description":13,"training_materials":280,"category":1160,"elearning_courses":1161},"x86 Code Performance Analysis","\u003Cp>This course is offered in two variants – a Linux variant and a Windows variant, reflecting the differences between the tools in the two different environments. The class will examine the performance of application code executing on the processor cores, with the assistance of the various tools available, and explore ways to optimize the performance. The class will include live demonstrations of the tools, allowing the students’ questions to drive the demonstrations. The processors discussed in the class are Intel’s core architecture.\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"x86 Code Performance Analysis\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli>The x86 architectural features impacting the performance of application code, and possibilities for taking advantage of them:\r\n\u003Cul>\r\n\u003Cli>The cache system\u003C/li>\r\n\u003Cli>Multiple processor cores\u003C/li>\r\n\u003Cli>Out-of-order execution of instructions\u003C/li>\r\n\u003Cli>Virtual memory mappings and the TLB\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Some of the tools available for analyzing the performance of application code\u003C/li>\r\n\u003Cli>The methodology for getting to good performance\u003C/li>\r\n\u003C/ul>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cem>Note, this is not a operating system tuning class, this is a programmer’s application code optimization class. The examples analyzed are all applications, but the ideas are also relevant to kernel code. There are no student exercises included as part of the class.\u003C/em>\u003C/p>","\u003Cp>Some experience of reading x86 assembly language is desirable, as the class will look at assembly code to see the details of execution. Familiarity with x86 processor and system architecture is also assumed.\u003C/p>","\u003Cul>\r\n\u003Cli>Power and performance\u003C/li>\r\n\u003Cli>Importance of algorithm and data structures – design for performance\u003C/li>\r\n\u003Cli>Methodology\u003C/li>\r\n\u003Cli>Advantages and disadvantages of optimizing to a particular processor implementation (microarchitecture)\r\n\u003Cul>\r\n\u003Cli>Ways that code can be made to be more flexible\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>The memory system\r\n\u003Cul>\r\n\u003Cli>Caches\u003C/li>\r\n\u003Cli>Multi-processor\u003C/li>\r\n\u003Cli>TLBs\u003C/li>\r\n\u003Cli>Cache line bounce\u003C/li>\r\n\u003Cli>Using the cache effectively\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Microarchitectural optimizations\r\n\u003Cul>\r\n\u003Cli>Core pipeline overview\u003C/li>\r\n\u003Cli>Out-of-order execution\u003C/li>\r\n\u003Cli>Handling “slow” instructions\u003C/li>\r\n\u003Cli>Execution serialization (e.g. microcode, MMIO)\u003C/li>\r\n\u003Cli>Issues with MMIO\u003C/li>\r\n\u003Cli>Example optimizations, e.g loop unrolling\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Hyperthreading\u003C/li>\r\n\u003Cli>Multiple processor cores\r\n\u003Cul>\r\n\u003Cli>Distribution of the workload across cores\u003C/li>\r\n\u003Cli>Core affinity\u003C/li>\r\n\u003Cli>Sharing issues\u003C/li>\r\n\u003Cli>Synchronization issues\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Compiler optimizations (Windows)\r\n\u003Cul>\r\n\u003Cli>Microsoft compiler\u003C/li>\r\n\u003Cli>Intel compiler\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Compiler optimizations (Linux)\r\n\u003Cul>\r\n\u003Cli>GCC\u003C/li>\r\n\u003Cli>Intel compiler\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Hotspot analysis, using perf (Linux)\u003C/li>\r\n\u003Cli>Hotspot analysis using VTune (Linux)\u003C/li>\r\n\u003Cli>Use of vector instructions (SSE, AVX)\r\n\u003Cul>\r\n\u003Cli>Benefits of using SSE/AVX even for applications where it may not seem appropriate\u003C/li>\r\n\u003Cli>Loop ordering and data structures, to optimize cache behavior\u003C/li>\r\n\u003Cli>Automatic vectorization\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Analysis using performance counters\r\n\u003Cul>\r\n\u003Cli>Cache misses, with perf (Linux), with WPR (Windows)\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Profile Guided Optimization\u003C/li>\r\n\u003Cli>System Topics\r\n\u003Cul>\r\n\u003Cli>Interrupts\u003C/li>\r\n\u003Cli>Direct cache injection\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Overview of virtualization optimization\r\n\u003Cul>\r\n\u003Cli>Analysis in a virtualized environment\u003C/li>\r\n\u003Cli>Ways to make code “virtualization friendly”\u003C/li>\r\n\u003Cli>Virtualization issues – caches, TLBs, multiple levels of page tables\u003C/li>\r\n\u003Cli>Virtualization and I/O\r\n\u003Cul>\r\n\u003Cli>Intel VT-d\u003C/li>\r\n\u003Cli>PCIe SR\u003C/li>\r\n\u003Cli>interrupt delivery\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>","2018-08-13T16:10:54.000000Z","2025-05-27T16:06:59.000000Z","public/live_training_courses/thumbnails/live_training_course_718_thumbnail_1748360995.png","x86-code-performance-analysis",85,{"id":396,"title":1065,"created_at":1066,"updated_at":1067,"order":47},[],1793031947244]