[{"data":1,"prerenderedAt":100},["ShallowReactive",2],{"GET-live-training-course/slug/nvme-{}-{}":3},{"data":4},{"id":5,"name":6,"slug":7,"description":8,"about":9,"training_materials":10,"you_will_learn":11,"prerequisites":12,"is_active":13,"category_id":14,"duration":15,"modified_at":16,"course_outline":17,"supplied_materials":16,"thumbnail":18,"elearning_courses":19,"ebooks":48,"topics":82,"reviews":99,"meta_title":16,"meta_description":16,"meta_keywords":16},706,"NVMe - NVM Express","nvme","\u003Cp class=\"p1\">\u003Cspan style=\"font-size: 12pt;\">MindShare's NVMe (Non-Volatile Memory Express) 2.2 course begins with a high-level view of this storage architecture to give the big-picture context for hardware and software interactions. We drill down into details for each aspect of NVMe. Next, we review all the changes and added features to the more recent spec revisions. Since NVMe-oF (NVMe over Fabrics) was combined with the original NVMe definition in the 2.0 spec revision, we include a thorough coverage of that as well. Finally, because many implementations of NVMe will use PCI Express (PCIe), a brief overview of that interface is included.\u003C/span>\u003C/p>\r\n\u003Cp> \u003C/p>\r\n\u003Cp>\u003Cspan style=\"color: rgb(186, 55, 42);\">\u003Cstrong>All of MindShare's classroom and virtual classroom courses can be customized to fit the needs of your group.\u003C/strong>\u003C/span>\u003C/p>","\u003Cp class=\"sectionsubhead\">\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"NVM Express (NVMe)\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","\u003Cul>\r\n\u003Cli style=\"font-family: helvetica, arial, sans-serif; font-size: 12pt;\">\u003Cspan style=\"font-family: helvetica, arial, sans-serif; font-size: 12pt;\">PDF of course slides\u003C/span>\u003C/li>\r\n\u003Cli style=\"font-size: 12pt; font-family: helvetica, arial, sans-serif;\">\u003Cspan style=\"font-size: 12pt; font-family: helvetica, arial, sans-serif;\">Optional add-on: NVMe 2.2 eLearning\u003C/span>\u003C/li>\r\n\u003C/ul>","\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">Basics of the NVMe Host Controller Interface model\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">The steps for device initialization\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">How command queues are set up and managed\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">How the host software\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003C!-- [if !supportLists]-->\u003C!--[endif]-->\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Informs the controller of new commands to execute\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003C!-- [if !supportLists]-->\u003C!--[endif]-->\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Learns that commands have been completed\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">The list of defined commands and how they work\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">How error reporting structures are defined\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">Power management options\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">The new features added with the more recent revisions to the spec (2.0, 2.1, and 2.2)\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">An overview of the storage fabrics in use today, and their strengths and weaknesses\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">The changes needed for NVMe to work in a fabric environment\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">How an NVMe host finds and accesses drives on a fabric\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt; font-family: Arial, sans-serif;\">How NVMe-oF provides a combination of attractive features for a storage fabric\u003C/span>\u003C/li>\r\n\u003C/ul>","\u003Cp class=\"MsoNormal\" style=\"margin-bottom: 0in; line-height: normal; mso-layout-grid-align: none; text-autospace: none;\">\u003Cspan style=\"font-size: 12pt; font-family: helvetica, arial, sans-serif; color: rgb(13, 13, 13);\">Previous exposure to PCIe is very helpful, as is some general knowledge of PC architecture. Additionally, some knowledge of legacy storage protocols such as SAS and networking protocols such as Ethernet is helpful. \u003C/span>\u003C/p>",true,10,"4 days",null,"\u003Cp>\u003Cspan style=\"font-size: 12pt;\">\u003Cstrong>Basic Topics (Covered on Day 1)\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">PCIe Architecture Overview\u003C/span>\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003C!-- [if !supportLists]-->\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Introduction\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Basic operation\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Transaction types\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Layers and responsibilities overview\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>NVMe Introduction\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">NVMe concepts and definitions\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Comparison with SATA\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">NVMe Host-Controller Interface overview\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Queue Management\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Doorbell Head and Tail registers\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Execution sequence\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Tracking completion status\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Commands\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">NVMe Admin Commands\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">General Structure of commands\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Identify command options and results\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Creation and management of Queues\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Asynchronous Event Notification\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">NVMe IO Commands\u003C/span>\r\n\u003Cul>\r\n\u003Cli>Read and Write command structure\u003C/li>\r\n\u003Cli>Optimizing write commands\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003C!--[endif]-->Avoiding write amplification\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003C!--[endif]-->Buffer addressing modes (PRPs vs. SGLs)\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003C!--[endif]-->Priority and Arbitration of commands\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003C!--[endif]-->Completing commands\u003C/span>\u003C/li>\r\n\u003Cli>Handling Metadata (DIF/DIX)\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003C!--[endif]-->Get Features / Set Features – full coverage of features\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp>\u003Cspan style=\"font-size: 12pt;\">\u003Cstrong>Additional Topics (Covered on Day 2)\u003C/strong>\u003C/span>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Architecture\u003C/span>\r\n\u003Cul>\r\n\u003Cli>Error reporting, Error Reporting Structures\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Asynchronous Events\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Completion status\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Log pages\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Other log pages\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Firmware updates\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Controller registers\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Controller initialization\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Power Management\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">Reservations\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli class=\"p1\">\u003Cspan style=\"font-size: 12pt;\"> \u003C/span>\u003Cspan style=\"font-size: 12pt;\">\u003C!-- [if !supportLists]-->\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Other NVMe commands\u003C/span>\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Write uncorrectable\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Write zeroes\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Compare\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Dataset management\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Configuration overview\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Summary of changes for 1.3\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Boot partitions\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Thermal management by host\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Write streams\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Deallocation\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Virtualization support\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Debug support – Telemetry, initiated by host or device\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Self-test options\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Sanitize command\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">New commands\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Summary of changes for 1.4\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">NVM Sets\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">I/O Determinism\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Read recovery levels\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Persistent Memory Region (PMR)\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">Asymmetric Namespace Access (ANA)\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Namespace write protect\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Persistent event log\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Rebuild assist\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Endurance groups\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">I/O Performance and Endurance Hints\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Traffic-based Keep Alive\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Vendor-specific UUIDs\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Verify - new command\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Administrative controller\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">SQ Associations\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp>\u003Cstrong style=\"font-size: 12pt;\">Additional Topics (Covered on Day 3)\u003C/strong>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Summary of changes for 2.0 through 2.2\u003C/span>\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Flexible Data Placement\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Live Migration\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Dispersed Namespaces (NS)\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Device Personalities\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Rotational (Spinning) media support\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Telemetry Log Changes\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Persistent Event Log Enhancements\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Updated I/O Commands\u003C/div>\r\n\u003Cul>\r\n\u003Cli>NVM Command Set\u003C/li>\r\n\u003Cli>Computational Command Set Overview\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Updated Admin Commands\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Controller Register Enhancements\u003C/div>\r\n\u003Cul>\r\n\u003Cli>CMB Write Buffer registers\u003C/li>\r\n\u003Cli>Time To Ready\u003C/li>\r\n\u003Cli>Shutdown options\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Zoned Namespaces Overview\u003C/div>\r\n\u003C/li>\r\n\u003Cli>\r\n\u003Cdiv class=\"elementToProof\">Key Value Overview\u003C/div>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003Cp>\u003Cstrong style=\"font-size: 12pt;\">NVMe-oF Topics (Covered on Day 4)\u003C/strong>\u003C/p>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Introduction\u003C/span>\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Motivation for moving NVMe to fabrics\u003C/span>\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Improve storage network performance \u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Avoid limitations of PCIe, extend NVMe protocol to the fabric\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Optimize access latency across the network\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Differences from base NVMe\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Initialization Background\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Fabric Discovery\u003C/span>\u003C/span>\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Discovery Service, Discovery Controllers\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Discovery Mechanism\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>NVMe-oF Initialization\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">Fabrics Commands\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">Device Setup\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Transport mapping/binding RDMA\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Introduction to RDMA (Remote Direct Memory Access)\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">Protocol Translation\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">RDMA Examples\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>RDMA Concepts\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">Motivation: Kernel bypass – reduce CPU involvement\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">Zero-copy operation when possible\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">RNIC (RDMA-aware Network Interface Card)\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Pinned remote memory and storage\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Command-based Flow Control\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Read and Write Command Examples\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>NVMe-oF Details\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Controller Initialization\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Connections and Associations\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Static vs. Dynamic Controller model\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Properties instead of registers\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Authentication\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">Encapsulation\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan lang=\"PT-BR\" style=\"font-family: Arial, sans-serif; color: black;\">Accessing RDMA Queue pairs\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Data transfer: Command, Response, Data, Flow Control\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Fabrics Commands and Responses\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>RNIC Details\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Software Layers\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">RDMA Verbs\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Memory Regions and Windows\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Ethernet overview\r\n\u003Cul>\r\n\u003Cli>TCP/IP: addressing, layers, packets\u003C/li>\r\n\u003Cli>RDMA models added to it: RoCE and iWARP\r\n\u003Cul>\r\n\u003Cli>Overview of iWARP\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Added to TCP/IP, so packets are routable and don’t need DCB\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Messages\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Layers\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Advantages and disadvantages\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>Overview of RoCE\r\n\u003Cul>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Version 2 packets include routing information, version 1 did not\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Use of Data Center Bridging (DCB) to manage routing\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Flow control\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Soft RoCE\u003C/span>\u003C/span>\u003C/li>\r\n\u003Cli>\u003Cspan style=\"font-size: 12pt;\">\u003Cspan style=\"font-family: Arial, sans-serif; color: black;\">Advantages and disadvantages\u003C/span>\u003C/span>\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>","https://mindshare-prod.s3.amazonaws.com/public/live_training_courses/thumbnails/live_training_course_706_thumbnail_1747668783.png",[20],{"id":21,"name":22,"slug":23,"description":24,"whats_included":25,"about":26,"instructor_fullname":27,"instructor_email":28,"equivelent_of":29,"subscription_length":30,"price":31,"price_arbor":32,"course_category_id":33,"elearning_courses":34,"you_will_learn":35,"prerequisites":36,"is_active":13,"modified_at":37,"order":29,"modules_count":38,"video":39},1746,"NVM Express 1.4 eLearning Course","nvm-express-14-elearning-course","\u003Cp>MindShare's NVMe (Non-Volatile Memory Express) 1.4 course begins with an optional review of PCI Express (PCIe) basics as a foundation for the study of NVMe. Next, a high-level view of the architecture provides the big-picture context of the hardware architecture and software interactions. Finally, we drill down into details for each aspect of the NVMe architecture. The course add details included in the 1.1, 1.2, 1.3 and 1.4 specs. \u003C/p>","\u003Ctable border=\"0\" cellspacing=\"0\">\r\n\u003Ctbody>\r\n\u003Ctr valign=\"bottom\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/nvme14_modules.png\" alt=\"PCIe Modules\" width=\"190\" height=\"135\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/nvme14_slides.png\" alt=\"PDF Slides Thumbnail\" width=\"175\" height=\"120\">\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\" width=\"25%\">\u003Cimg style=\"max-height: 150px;\" src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/pcie3_cover_ds.png\" alt=\"PCIe eBook\" width=\"125\" height=\"155\">\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cimg src=\"https://mindshare-prod.s3.amazonaws.com/public/uploaded/course_certificate160px.png\" alt=\"Course completion certificate\" width=\"213\" height=\"160\">\u003C/td>\r\n\u003C/tr>\r\n\u003Ctr valign=\"top\">\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>NVM Express 1.4 eLearning modules\u003C/strong>\u003Cbr>(unlimited access for 120 days)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PDF of Course Slides\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd style=\"border-right: 1px solid rgb(233, 233, 233);\" align=\"center\">\u003Cstrong>PCI Express eBook\u003C/strong>\u003Cbr>(yours to keep, does not expire)\u003C/td>\r\n\u003Ctd align=\"center\">\u003Cstrong>Course Completion Certificate\u003C/strong>\u003Cbr>(boost your resume / CV)\u003C/td>\r\n\u003C/tr>\r\n\u003C/tbody>\r\n\u003C/table>","\u003Cp>\u003Cspan style=\"font-size: 18pt;\">\u003Cstrong>Let MindShare Bring \"NVMe\" to Life for You\u003C/strong>\u003C/span>\u003C/p>","Mike Jackson","mike@mindshare.com",2,120,"695","595",18,[],"\u003Cul>\r\n\u003Cli>Basics of the NVMe Host Controller Interface model\u003C/li>\r\n\u003Cli>The steps for device initialization\u003C/li>\r\n\u003Cli>How command queues are set up and managed\u003C/li>\r\n\u003Cli>How host software:\r\n\u003Cul>\r\n\u003Cli style=\"list-style-type: none;\">\r\n\u003Cul>\r\n\u003Cli>Informs the controller of new commands to execute\u003C/li>\r\n\u003Cli>Learns that commands have been completed\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003C/ul>\r\n\u003C/li>\r\n\u003Cli>What commands are defined up to 1.4 spec, and how they work\u003C/li>\r\n\u003Cli>Error reporting structures\u003C/li>\r\n\u003Cli>Power management options\u003C/li>\r\n\u003Cli>Optional PCIe architecture overview on request\u003C/li>\r\n\u003C/ul>","\u003Cp>None\u003C/p>","2025-01-02 16:45:25",41,{"id":40,"local_path":41,"file_name":42,"mime":16,"vimeo_uri":43,"duration":44,"thumbnail_filename":45,"local_thumbnail_path":46,"thumbnail_url":47},37752,"storage/app/videos/legacy/previews/","legacy-440171725.mp4","/videos/440171725",492,"NVM_Express_1.4_eLearning_Course_thumbnail.png","storage/app/public/thumbnails/","https://mindshare-prod.s3.amazonaws.com/public/elearning_courses/thumbnails/NVM_Express_1.4_eLearning_Course_thumbnail.png",[49],{"id":50,"name":51,"slug":52,"category_id":53,"author":16,"revision":54,"errata_text":55,"errata_link":56,"price":16,"file_path":57,"file_name":58,"cover_url":59,"peek_inside_file":16,"peek_inside_url":16,"overview":60,"has_book":61,"book_out_of_stock":61,"key_topics":62,"about_the_authors":63,"info":64,"authors":65,"publisher":66,"pages":67,"retail_price":68,"ebook_price":69,"book_price":70,"combined_price":70,"tags":71,"price_type":72,"related_items":73,"shipping_details":74,"is_active":13,"meta_title":77,"meta_description":77,"meta_keywords":78,"user_ebook":79},381,"PCI Express Technology 3.0","pci-express-technology-30",1,"1.03","Errata as of November 12, 2017 (First Printing and eBook up to v1.02)","https://www.mindshare.com/images/PCIe_3.0_Errata_November_12_2017.pdf","storage/app/ebooks/legacy/protected/","MindShare_PCIe30_eBook_v1.03.pdf","https://mindshare-prod.s3.amazonaws.com/public/ebook_covers/PCI_Express_Technology_3.0_cover-2025-06-30_15%3A23%3A39.jpg","\u003Cp>PCI Express 3.0 is the latest generation of the popular peripheral interface found in virtually every PC, server, and industrial computer. Its high bandwidth, low latency, and cost-to-performance ratio make it a natural choice for many peripheral devices today. Each new generation of PCI Express adds more features, capabilities and bandwidth, which maintains its popularity as a device interconnect.\u003Cbr>\u003Cbr>MindShare's books take the hard work out of deciphering the specs, and this one follows that tradition. MindShare's \u003Cem>PCI Express Technology\u003C/em> book provides a thorough description of the interface with numerous practical examples that illustrate the concepts. Written in a tutorial style, this book is ideal for anyone new to PCI Express. At the same time, its thorough coverage of the details makes it an essential resource for seasoned veterans.\u003C/p>",false,"\u003Cul>\r\n\u003Cli>PCI Express Origins\u003C/li>\r\n\u003Cli>Configuration Space and Access Methods\u003C/li>\r\n\u003Cli>Enumeration Process\u003C/li>\r\n\u003Cli>Packet Types and Fields\u003C/li>\r\n\u003Cli>Transaction Ordering\u003C/li>\r\n\u003Cli>Traffic Classes, Virtual Channels and Arbitration (QoS)\u003C/li>\r\n\u003Cli>Flow Control\u003C/li>\r\n\u003Cli>ACK/NAK Protocol\u003C/li>\r\n\u003Cli>Logical PHY (8b/10b, 128b/130b, Scrambling)\u003C/li>\r\n\u003Cli>Electrical PHY\u003C/li>\r\n\u003Cli>Link Training and Initialization\u003C/li>\r\n\u003Cli>Interrupt Delivery (Legacy, MSI, MSI-X)\u003C/li>\r\n\u003Cli>Error Detection and Reporting\u003C/li>\r\n\u003Cli>Power Management (for both software and hardware)\u003C/li>\r\n\u003Cli>2.0 and 2.1 Features (such as 5.0GT/s, TLP Hints, and Multi-Casting)\u003C/li>\r\n\u003Cli>3.0 Features (such as 8.0GT/s, and a new encoding scheme)\u003C/li>\r\n\u003Cli>Considerations for High Speed Signaling (such as Equalization)\u003C/li>\r\n\u003C/ul>","\u003Cp class=\"body\">\u003Cstrong>Mike Jackson\u003C/strong>, is a senior staff engineer and instructor with MindShare, Inc., where he has trained thousands of engineers. He is an industry expert on such topics as Intel Processor and PC architecture, as well as such bus architectures as SAS, PCI, PCI-X, and PCI Express. Before joining MindShare, Mr. Jackson worked as a high-speed digital designer for AMD and as an ASIC developer for several years with Compaq Computer Corp.\u003C/p>\r\n\u003Cp class=\"body\">\u003Cstrong>Ravi Budruk\u003C/strong> is a partial owner and instructor with MindShare, Inc., where he has trained hundreds of engineers. He is an industry expert on such topics as Intel processors and PC architecture, as well as such bus architectures as PCI Express, PCI, PCI-X, HyperTransport, IEEE 1394, and ISA. Before working at MindShare, Mr. Budruk was a PC chipset architect and designer at VLSI Technology, Inc.\u003C/p>","\u003Cp>“MindShare books are critical in the understanding of complex technical topics, such as PCI Express 3.0 architecture. Many of our customers and industry partners depend on these books for the success of their projects.”\u003Cbr>\u003Cbr>— Joe Mendolia - Vice President, LeCroy\u003C/p>","Mike Jackson, Ravi Budruk","MindShare Press",1056,"94.99","40","0",[],"ebook_price",[],{"book_width":75,"book_length":75,"book_height":75,"book_weight":76},0.01,0.006,"MindShare PCI Express 3.0 book","pcie, pci express, 3.0, book",{"id":80,"presentation_id":16,"downloaded":61,"signed_file_name":16,"watermark_status":81,"is_new":61,"revision":16},34240,"WATERMARK_NOT_CREATED",[83,90],{"id":84,"course_name":6,"classroom_info":15,"virtual_classroom_info":85,"file_url":86,"course_link":87,"link":88,"file_name":89},170,"8 half-days","https://mindshare-prod.s3.amazonaws.com/public/live_training_course_topics_pdfs/MindShare_NVMe_2_2_Agenda.pdf","/live-training-course/nvme","/elearning-course/nvm-express-14-elearning-course","MindShare_NVMe_2_2_Agenda.pdf",{"id":91,"course_name":92,"classroom_info":93,"virtual_classroom_info":94,"file_url":95,"course_link":96,"link":97,"file_name":98},186,"NVMe-oF - NVMe over Fabrics","1 day","2 half-days","https://mindshare-prod.s3.amazonaws.com/public/live_training_course_topics_pdfs/MindShare_NVMe-oF_Outline.pdf","/live-training-course/nvme-of","/elearning-course/nvme-of-elearning-course","MindShare_NVMe-oF_Outline.pdf",[16],1793031959197]